On 11/9/22 02:41, Taylor Simpson wrote:
-----Original Message-----
From: Richard Henderson <richard.hender...@linaro.org>
Sent: Tuesday, November 8, 2022 1:24 AM
To: Taylor Simpson <tsimp...@quicinc.com>; qemu-devel@nongnu.org
Cc: phi...@linaro.org; a...@rev.ng; a...@rev.ng; Brian Cain
<bc...@quicinc.com>; Matheus Bernardino (QUIC)
<quic_mathb...@quicinc.com>
Subject: Re: [PATCH v4 10/11] Hexagon (target/hexagon) Use direct block
chaining for direct jump/branch
On 11/8/22 15:05, Taylor Simpson wrote:
static void hexagon_tr_tb_start(DisasContextBase *db, CPUState *cpu)
{
+ DisasContext *ctx = container_of(db, DisasContext, base);
+ ctx->branch_cond = TCG_COND_NEVER;
}
Typically this would go in hexagon_tr_init_disas_context as well, but I don't
suppose it really matters.
AFAICT, these are always called back to back. So, it's not clear to me what
the distinction should be.
ops->tb_start is called after gen_tb_start, so you can emit code that comes after the
interrupt/icount check, but before the first guest instruction. Rarely needed, should
probably be allowed to be NULL.
r~
