On 24/11/22 22:29, Jiaxun Yang wrote:
MIPS VirtIO board is design to utilize existing VirtIO infrastures
but also comptitable with MIPS's existing internal simulation tools.
It includes virtio-mmio, pcie gpex, flash rom, fw_cfg, goldfish-rtc,
and optional goldfish_pic in case MIPS GIC is not present.
It should be able to cooperate with any MIPS CPU cores.
Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com>
---
configs/devices/mips-softmmu/common.mak | 1 +
hw/mips/Kconfig | 18 +
hw/mips/meson.build | 1 +
hw/mips/virt.c | 1039 +++++++++++++++++++++++
4 files changed, 1059 insertions(+)
create mode 100644 hw/mips/virt.c
diff --git a/configs/devices/mips-softmmu/common.mak
b/configs/devices/mips-softmmu/common.mak
index 416161f833..534b7843eb 100644
--- a/configs/devices/mips-softmmu/common.mak
+++ b/configs/devices/mips-softmmu/common.mak
@@ -29,6 +29,7 @@ CONFIG_MC146818RTC=y
CONFIG_EMPTY_SLOT=y
CONFIG_MIPS_CPS=y
CONFIG_MIPS_ITU=y
+CONFIG_MIPS_VIRT=y
Is there any value adding the 32-bit machine, or can we just add it as
64-bit?
+struct MIPSVirtState {
+ MachineState parent;
+
+ Notifier machine_done;
+ Clock *cpuclk;
+ DeviceState *platform_bus_dev;
+ MIPSCPSState *cps;
+ DeviceState *pic;
+ PFlashCFI01 *flash[2];
We should be fine with 1 ROM for CODE and 1 flash for VARS,
see my previous comments on the LoongArch virt machine:
https://lore.kernel.org/qemu-devel/2f381d06-842f-ac8b-085c-0419675a4...@linaro.org/
https://lore.kernel.org/qemu-devel/b62401b2-3a12-e89d-6953-b40dd170b...@linaro.org/
+ FWCfgState *fw_cfg;
+
+ MIPSVirtPlatType plat_type;
+ int fdt_size;
+};
