> -----Original Message-----
> From: Marco Liebel (QUIC) <quic_mlie...@quicinc.com>
> Sent: Thursday, January 5, 2023 4:24 AM
> To: qemu-devel@nongnu.org
> Cc: Taylor Simpson <tsimp...@quicinc.com>; Brian Cain
> <bc...@quicinc.com>; Marco Liebel (QUIC) <quic_mlie...@quicinc.com>
> Subject: [PATCH v3] Hexagon (target/hexagon) implement mutability mask
> for GPRs
>
> Some registers are defined to have immutable bits, this commit will
> implement that behavior.
>
> Signed-off-by: Marco Liebel <quic_mlie...@quicinc.com>
> ---
> target/hexagon/genptr.c | 44 ++++++++-
> tests/tcg/hexagon/Makefile.target | 1 +
> tests/tcg/hexagon/reg_mut.c | 152
> ++++++++++++++++++++++++++++++
> 3 files changed, 195 insertions(+), 2 deletions(-) create mode 100644
> tests/tcg/hexagon/reg_mut.c
Reviewed-by: Taylor Simpson <tsimp...@quicinc.com>
