On 1/16/23 05:37, Evgeny Iakovlev wrote:
Hi!
We are using qemu-tcg-aarch64 to run Hyper-V test and debug builds for arm. Besides some
minor fixes that i have submitted over the last couple of weeks, one big compatibility
item for us is SMMUv3 2-stage translations support. We can do fine without it right now,
but having it would also allow us to test nested arm guests with SMMUv3, which is great.
One idea we have floating around is implementing 2-stage translations in SMMUv3 in Qemu.
We can't make a commitment yet, but before we consider it i think it would be wise to ask
the community about it, specifically:
* Do 2-stage translations sound like something qemu-arm would be keen on accepting? Are
there any other use-cases for it besides an arguably wild corner case of nesting an EL2
hypervisor on software-emulated arm64?
I've recently been looking at the requirements for the full ARM Confidential Computing
Architecture stack, outside of the core cpu architecture extension just posted.
While it appears as if Hyp (and therefore stage2) is not explicitly required, it certainly
looks like the Realm Management Monitor should be using it (since the guest OS running
underneath in Realm EL1 is not necessarily trusted), and I would be surprised if real
hardware lacks any of this support.
I would be delighted to review any patches for missing smmu features, and coordinate
filling in all of SMMUv3.3 plus RME.
r~
