On 1/27/23 07:54, Peter Maydell wrote:
Mark up the sysreg definitions for the registers trapped
by HDFGRTR/HDFGWTR bits 12..x.
Bits 12..22 and bit 58 are for PMU registers.
The remaining bits in HDFGRTR/HDFGWTR are for traps on
registers that are part of features we don't implement:
Bits 23..32 and 63 : FEAT_SPE
Bits 33..48 : FEAT_ETE
Bits 50..56 : FEAT_TRBE
Bits 59..61 : FEAT_BRBE
Bit 62 : FEAT_SPEv1p2.
Signed-off-by: Peter Maydell<peter.mayd...@linaro.org>
---
target/arm/cpregs.h | 12 ++++++++++++
target/arm/helper.c | 37 +++++++++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
