I am wondering the possibilities of using the nested page table mechanism available on the x86 processors to do page translation for non-x86 operating system emulation.
So, when nested page is enabled, you can control the gCR3 and hCR3. The gCR3 can be used to point to the page table of the running process in the guest operating system and the hCR3 can be used to point to the page table of the QEMU process. Assuming the page table layouts of both operating systems are exactly the same. I think this can be done. However there are a few problems I see here. I would like to hear some suggestions or corrections. 1. The control of gCR3 and hCR3 needs kernel access. While they can be set with a device module as what is done in kvm. Trapping into the kernel every time gCR3 is reseted might be too expensive. 2. After setting the gCR3 and hCR3. whatever memory references fall within the guest memory will be done correctly. However, memory references done by the host will be broken. Therefore, when we load the from the CPUstates, call to helpers for exits from the code cache, we need to change the paging mechanism back to non-nested. can this be done ? how expensive will this be ? 3. Lastly and most importantly, the code cache is based on a host address, what about fetching instructions from the code cache, this has to happen in non-nested mode ? Thanks Xin
