Based-on: 20230216025739.1211680-1-richard.hender...@linaro.org
("[PATCH v2 00/30] tcg: Improve atomicity support")
Testing has not been extensive, but it does boot and run stuff.
Suggestions for actually testing atomicity solicited.
I would imagine it would have to involve -semihosting...
r~
Richard Henderson (19):
target/arm: Make cpu_exclusive_high hold the high bits
target/arm: Use tcg_gen_qemu_ld_i128 for LDXP
target/arm: Use tcg_gen_qemu_{st,ld}_i128 for do_fp_{st,ld}
target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G
target/arm: Use tcg_gen_qemu_{ld,st}_i128 in gen_sve_{ld,st}r
target/arm: Sink gen_mte_check1 into load/store_exclusive
target/arm: Add feature test for FEAT_LSE2
target/arm: Add atom_data to DisasContext
target/arm: Load/store integer pair with one tcg operation
target/arm: Hoist finalize_memop out of do_gpr_{ld,st}
target/arm: Hoist finalize_memop out of do_fp_{ld,st}
target/arm: Pass memop to gen_mte_check1*
target/arm: Pass single_memop to gen_mte_checkN
target/arm: Check alignment in helper_mte_check
target/arm: Add SCTLR.nAA to TBFLAG_A64
target/arm: Relax ordered/atomic alignment checks for LSE2
target/arm: Move mte check for store-exclusive
test/tcg/multiarch: Adjust sigbus.c
target/arm: Enable FEAT_LSE2 for -cpu max
docs/system/arm/emulation.rst | 1 +
target/arm/cpu.h | 8 +-
target/arm/helper-a64.h | 3 +
target/arm/internals.h | 3 +-
target/arm/translate-a64.h | 4 +-
target/arm/translate.h | 16 +-
target/arm/cpu64.c | 1 +
target/arm/helper-a64.c | 7 +
target/arm/helper.c | 6 +
target/arm/mte_helper.c | 18 ++
target/arm/translate-a64.c | 521 ++++++++++++++++++++++------------
target/arm/translate-sve.c | 118 ++++++--
target/arm/translate.c | 1 +
tests/tcg/aarch64/mte-7.c | 3 +-
tests/tcg/multiarch/sigbus.c | 13 +-
15 files changed, 498 insertions(+), 225 deletions(-)
--
2.34.1
