When booting sbsa-ref board with Neoverse-N1, TF-A's would try to access implementation defined registers in it as well as in DSU for errata. Add the definitions for these system registers to make sbsa-ref boot with Neoverse-N1.
I have noticed that there is a patch series under review which move TCG CPUs into tcg/. Therefore this patch should be rework once that patch has been merged. Chen Baozi (2): target/arm: Add Neoverse-N1 registers target/arm: Add DynamIQ Shared Unit control registers target/arm/cpu64.c | 2 + target/arm/cpu_tcg.c | 114 +++++++++++++++++++++++++++++++++++++++++ target/arm/internals.h | 2 + 3 files changed, 118 insertions(+) -- 2.37.3
