This patchset tries to simplify the RVH related check and fix some code style problems, such as problems for indentation, multi-line comments and lines with over 80 characters.
The port is available here: https://github.com/plctlab/plct-qemu/tree/plct-virtfix-upstream v2: * add comment to specify riscv_cpu_set_virt_enabled() can only be called when RVH is enabled in patch 4 (suggested by Richard Henderson) * merge patch from LIU Zhiwei(Message-ID: <20230325145348.1208-1-zhiwei_...@linux.alibaba.com>) to patch 5 * use env->virt_enabled directly instead of riscv_cpu_virt_enabled() in patch 6 (suggested by LIU Zhiwei) * remain the orginal identation for macro name in patch 8 (suggested by LIU Zhiwei) LIU Zhiwei (1): target/riscv: Convert env->virt to a bool env->virt_enabled Weiwei Li (9): target/riscv: Remove redundant call to riscv_cpu_virt_enabled target/riscv: Remove redundant check on RVH target/riscv: Remove check on RVH for riscv_cpu_virt_enabled target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled target/riscv: Remove riscv_cpu_virt_enabled() target/riscv: Remove redundant parentheses target/riscv: Fix format for indentation target/riscv: Fix format for comments target/riscv: Fix lines with over 80 characters target/riscv/arch_dump.c | 7 +- target/riscv/cpu.c | 8 +- target/riscv/cpu.h | 29 +-- target/riscv/cpu_bits.h | 5 +- target/riscv/cpu_helper.c | 142 ++++++------ target/riscv/csr.c | 52 ++--- target/riscv/debug.c | 10 +- target/riscv/insn_trans/trans_rvv.c.inc | 36 +-- target/riscv/machine.c | 6 +- target/riscv/op_helper.c | 21 +- target/riscv/pmp.c | 48 ++-- target/riscv/pmp.h | 9 +- target/riscv/pmu.c | 7 +- target/riscv/sbi_ecall_interface.h | 8 +- target/riscv/translate.c | 14 +- target/riscv/vector_helper.c | 292 ++++++++++++++---------- 16 files changed, 378 insertions(+), 316 deletions(-) -- 2.25.1
