Hi, In this version we have changes in patch 3 suggested by Richard Henderson in the v1 review.
Patches are based on Alistair's riscv-to-apply.next. Changes from v1: - patch 3: - change misa_ext_cfgs[] to a const array - remove dynamic allocation of strings and use the string literals - v1 link: https://lists.gnu.org/archive/html/qemu-devel/2023-03/msg06337.html Daniel Henrique Barboza (19): target/riscv: sync env->misa_ext* with cpu->cfg in realize() target/riscv: remove MISA properties from isa_edata_arr[] target/riscv: introduce riscv_cpu_add_misa_properties() target/riscv: remove cpu->cfg.ext_a target/riscv: remove cpu->cfg.ext_c target/riscv: remove cpu->cfg.ext_d target/riscv: remove cpu->cfg.ext_f target/riscv: remove cpu->cfg.ext_i target/riscv: remove cpu->cfg.ext_e target/riscv: remove cpu->cfg.ext_m target/riscv: remove cpu->cfg.ext_s target/riscv: remove cpu->cfg.ext_u target/riscv: remove cpu->cfg.ext_h target/riscv: remove cpu->cfg.ext_j target/riscv: remove cpu->cfg.ext_v target/riscv: remove riscv_cpu_sync_misa_cfg() target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cpu_init() target/riscv: add RVG and remove cpu->cfg.ext_g target/riscv/cpu.c: redesign register_cpu_props() target/riscv/cpu.c | 268 ++++++++++++++++++++++++--------------------- target/riscv/cpu.h | 19 +--- 2 files changed, 144 insertions(+), 143 deletions(-) -- 2.39.2
