On 3/27/23 18:54, LIU Zhiwei wrote:
Can we remove the PRIV from the tb flags after we have this function?
No, because this is the priv of the memory operation as modified by e.g. MPRV, not the
true cpu priv.
For this implementation, we explicitly use the tb flags for mmu index. I think it is the
reason why we have to maintain the redundant privilege in tb flags.
It may be better to only store machine states into tb flags. Can we just pass everything
that we need, for example, the priv and sum, and then implicitly
calculate the ctx->mem_idx in disas_init_fn?
I remember that you give the similar suggestion in the comment process
https://mail.gnu.org/archive/html/qemu-riscv/2023-03/msg00566.html
Best Regards,
Zhiwei
To make this comment clear, I paste a simple implementatioin here. But it is just for
discussing, not a normal patch for merging.
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 623288e6f9..d4506be5be 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -632,12 +632,10 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env,
target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
-#define TB_FLAGS_PRIV_MMU_MASK 3
-#define TB_FLAGS_PRIV_HYP_ACCESS_MASK (1 << 2)
-
#include "exec/cpu-all.h"
-FIELD(TB_FLAGS, MEM_IDX, 0, 3)
+FIELD(TB_FLAGS, PRIV, 0, 2)
+FIELD(TB_FLAGS, SUM, 2, 1)
We would need to include MPRV, MPP, MPV, VIRT_ENABLED as well. With SUM, that would be 6
bits in tb_flags instead of 3 bits for MEM_IDX.
r~
