Hi, Richard
在 2023/4/1 下午1:03, Richard Henderson 写道:
On 3/27/23 20:06, Song Gao wrote:
+static void gen_vsat_s(unsigned vece, TCGv_vec t, TCGv_vec a,
int64_t imm)
+{
+ TCGv_vec t1;
+ int64_t max = (1l << imm) - 1;
This needed 1ull, but better to just use
max = MAKE_64BIT_MASK(0, imm - 1);
For the signed version use ll?
I think use MAKE_64BIT_MASK(0, imm -1 ) for the signed version is not
suitable.
e.g imm is 1,
imm is 1
1ll << imm -1 1
1ull << imm -1 1
MAKE_64BIT_MASK ffffffffffffffff
vsat.w vr 22 vr25 0x1.
input vr25: {0, 0}
result vr22: {0, 0}
if we use MAKE_64BIT_MASK , result is {ffffffffffffffff,
ffffffffffffffff}.
This is RISU test log:
......
imm is d
1ll << imm -1 1fff
1ull << imm -1 1fff
MAKE_64BIT_MASK fff
imm is 8
1ll << imm -1 ff
1ull << imm -1 ff
MAKE_64BIT_MASK 7f
imm is 7
1ll << imm -1 7f
1ull << imm -1 7f
MAKE_64BIT_MASK 3f
imm is 1d
1ll << imm -1 1fffffff
1ull << imm -1 1fffffff
MAKE_64BIT_MASK fffffff
imm is 29
1ll << imm -1 1ffffffffff
1ull << imm -1 1ffffffffff
MAKE_64BIT_MASK ffffffffff
imm is 6
1ll << imm -1 3f
1ull << imm -1 3f
MAKE_64BIT_MASK 1f
imm is 3
1ll << imm -1 7
1ull << imm -1 7
MAKE_64BIT_MASK 3
imm is 1
1ll << imm -1 1
1ull << imm -1 1
MAKE_64BIT_MASK ffffffffffffffff
Mismatch reg after 63 checkpoints
......
mismatch detail (master : apprentice):
f22 : 0000000000000000 vs ffffffffffffffff
v22 : {0000000000000000, 0000000000000000} vs {ffffffffffffffff,
ffffffffffffffff}
Thanks.
Song Gao.
