On Sat, Mar 25, 2023 at 9:58 PM Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> From: LIU Zhiwei <zhiwei_...@linux.alibaba.com>
>
> Virt enabled state is not a constant. So we should put it into tb flags.
> Thus we can use it like a constant condition at translation phase.
>
> Reported-by: Richard Henderson <richard.hender...@linaro.org>
> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
> Signed-off-by: LIU Zhiwei <zhiwei_...@linux.alibaba.com>
> Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
> Message-Id: <20230324143031.1093-2-zhiwei_...@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu.h | 2 ++
> target/riscv/cpu_helper.c | 2 ++
> target/riscv/translate.c | 10 +---------
> 3 files changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 638e47c75a..12fe8d8546 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -650,6 +650,8 @@ FIELD(TB_FLAGS, VTA, 24, 1)
> FIELD(TB_FLAGS, VMA, 25, 1)
> /* Native debug itrigger */
> FIELD(TB_FLAGS, ITRIGGER, 26, 1)
> +/* Virtual mode enabled */
> +FIELD(TB_FLAGS, VIRT_ENABLED, 27, 1)
>
> #ifdef TARGET_RISCV32
> #define riscv_cpu_mxl(env) ((void)(env), MXL_RV32)
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index f88c503cf4..9d50e7bbb6 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -104,6 +104,8 @@ void cpu_get_tb_cpu_state(CPURISCVState *env,
> target_ulong *pc,
>
> flags = FIELD_DP32(flags, TB_FLAGS, MSTATUS_HS_VS,
> get_field(env->mstatus_hs, MSTATUS_VS));
> + flags = FIELD_DP32(flags, TB_FLAGS, VIRT_ENABLED,
> + get_field(env->virt, VIRT_ONOFF));
> }
> if (cpu->cfg.debug && !icount_enabled()) {
> flags = FIELD_DP32(flags, TB_FLAGS, ITRIGGER, env->itrigger_enabled);
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 0ee8ee147d..880f6318aa 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -1156,15 +1156,7 @@ static void
> riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
> ctx->mstatus_fs = tb_flags & TB_FLAGS_MSTATUS_FS;
> ctx->mstatus_vs = tb_flags & TB_FLAGS_MSTATUS_VS;
> ctx->priv_ver = env->priv_ver;
> -#if !defined(CONFIG_USER_ONLY)
> - if (riscv_has_ext(env, RVH)) {
> - ctx->virt_enabled = riscv_cpu_virt_enabled(env);
> - } else {
> - ctx->virt_enabled = false;
> - }
> -#else
> - ctx->virt_enabled = false;
> -#endif
> + ctx->virt_enabled = FIELD_EX32(tb_flags, TB_FLAGS, VIRT_ENABLED);
> ctx->misa_ext = env->misa_ext;
> ctx->frm = -1; /* unknown rounding mode */
> ctx->cfg_ptr = &(cpu->cfg);
> --
> 2.34.1
>
>
