There are several places where we already convert back from
bool to type. Clean things up by using type throughout.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
tcg/mips/tcg-target.c.inc | 56 +++++++++++++++++++--------------------
1 file changed, 27 insertions(+), 29 deletions(-)
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index a83ebe8729..568cfe7728 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -1479,7 +1479,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
#endif /* SOFTMMU */
static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg lo, TCGReg hi,
- TCGReg base, MemOp opc, bool is_64)
+ TCGReg base, MemOp opc, TCGType type)
{
switch (opc & (MO_SSIZE | MO_BSWAP)) {
case MO_UB:
@@ -1503,7 +1503,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg
lo, TCGReg hi,
tcg_out_opc_imm(s, OPC_LH, lo, base, 0);
break;
case MO_UL | MO_BSWAP:
- if (TCG_TARGET_REG_BITS == 64 && is_64) {
+ if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64) {
if (use_mips32r2_instructions) {
tcg_out_opc_imm(s, OPC_LWU, lo, base, 0);
tcg_out_bswap32(s, lo, lo, TCG_BSWAP_IZ | TCG_BSWAP_OZ);
@@ -1528,7 +1528,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg
lo, TCGReg hi,
}
break;
case MO_UL:
- if (TCG_TARGET_REG_BITS == 64 && is_64) {
+ if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64) {
tcg_out_opc_imm(s, OPC_LWU, lo, base, 0);
break;
}
@@ -1583,7 +1583,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg
lo, TCGReg hi,
}
static void tcg_out_qemu_ld_unalign(TCGContext *s, TCGReg lo, TCGReg hi,
- TCGReg base, MemOp opc, bool is_64)
+ TCGReg base, MemOp opc, TCGType type)
{
const MIPSInsn lw1 = MIPS_BE ? OPC_LWL : OPC_LWR;
const MIPSInsn lw2 = MIPS_BE ? OPC_LWR : OPC_LWL;
@@ -1623,7 +1623,7 @@ static void tcg_out_qemu_ld_unalign(TCGContext *s, TCGReg
lo, TCGReg hi,
case MO_UL:
tcg_out_opc_imm(s, lw1, lo, base, 0);
tcg_out_opc_imm(s, lw2, lo, base, 3);
- if (TCG_TARGET_REG_BITS == 64 && is_64 && !sgn) {
+ if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64 && !sgn) {
tcg_out_ext32u(s, lo, lo);
}
break;
@@ -1634,18 +1634,18 @@ static void tcg_out_qemu_ld_unalign(TCGContext *s,
TCGReg lo, TCGReg hi,
tcg_out_opc_imm(s, lw1, lo, base, 0);
tcg_out_opc_imm(s, lw2, lo, base, 3);
tcg_out_bswap32(s, lo, lo,
- TCG_TARGET_REG_BITS == 64 && is_64
+ TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64
? (sgn ? TCG_BSWAP_OS : TCG_BSWAP_OZ) : 0);
} else {
const tcg_insn_unit *subr =
- (TCG_TARGET_REG_BITS == 64 && is_64 && !sgn
+ (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64 && !sgn
? bswap32u_addr : bswap32_addr);
tcg_out_opc_imm(s, lw1, TCG_TMP0, base, 0);
tcg_out_bswap_subr(s, subr);
/* delay slot */
tcg_out_opc_imm(s, lw2, TCG_TMP0, base, 3);
- tcg_out_mov(s, is_64 ? TCG_TYPE_I64 : TCG_TYPE_I32, lo, TCG_TMP3);
+ tcg_out_mov(s, type, lo, TCG_TMP3);
}
break;
@@ -1702,7 +1702,7 @@ static void tcg_out_qemu_ld_unalign(TCGContext *s, TCGReg
lo, TCGReg hi,
}
}
-static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
+static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGType d_type)
{
TCGReg addr_regl, addr_regh __attribute__((unused));
TCGReg data_regl, data_regh;
@@ -1716,7 +1716,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is_64)
TCGReg base = TCG_REG_A0;
data_regl = *args++;
- data_regh = (TCG_TARGET_REG_BITS == 32 && is_64 ? *args++ : 0);
+ data_regh = (TCG_TARGET_REG_BITS == 64 || d_type == TCG_TYPE_I32
+ ? 0 : *args++);
addr_regl = *args++;
addr_regh = (TCG_TARGET_REG_BITS < TARGET_LONG_BITS ? *args++ : 0);
oi = *args++;
@@ -1731,14 +1732,12 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is_64)
#if defined(CONFIG_SOFTMMU)
tcg_out_tlb_load(s, base, addr_regl, addr_regh, oi, label_ptr, 1);
if (use_mips32r6_instructions || a_bits >= s_bits) {
- tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64);
+ tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, d_type);
} else {
- tcg_out_qemu_ld_unalign(s, data_regl, data_regh, base, opc, is_64);
+ tcg_out_qemu_ld_unalign(s, data_regl, data_regh, base, opc, d_type);
}
- add_qemu_ldst_label(s, 1, oi,
- (is_64 ? TCG_TYPE_I64 : TCG_TYPE_I32),
- data_regl, data_regh, addr_regl, addr_regh,
- s->code_ptr, label_ptr);
+ add_qemu_ldst_label(s, true, oi, d_type, data_regl, data_regh,
+ addr_regl, addr_regh, s->code_ptr, label_ptr);
#else
if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
tcg_out_ext32u(s, base, addr_regl);
@@ -1755,15 +1754,15 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is_64)
if (a_bits) {
tcg_out_test_alignment(s, true, addr_regl, addr_regh, a_bits);
}
- tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64);
+ tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, d_type);
} else {
if (a_bits && a_bits != s_bits) {
tcg_out_test_alignment(s, true, addr_regl, addr_regh, a_bits);
}
if (a_bits >= s_bits) {
- tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64);
+ tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, d_type);
} else {
- tcg_out_qemu_ld_unalign(s, data_regl, data_regh, base, opc, is_64);
+ tcg_out_qemu_ld_unalign(s, data_regl, data_regh, base, opc,
d_type);
}
}
#endif
@@ -1902,7 +1901,7 @@ static void tcg_out_qemu_st_unalign(TCGContext *s, TCGReg
lo, TCGReg hi,
g_assert_not_reached();
}
}
-static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
+static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, TCGType d_type)
{
TCGReg addr_regl, addr_regh __attribute__((unused));
TCGReg data_regl, data_regh;
@@ -1915,7 +1914,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is_64)
TCGReg base = TCG_REG_A0;
data_regl = *args++;
- data_regh = (TCG_TARGET_REG_BITS == 32 && is_64 ? *args++ : 0);
+ data_regh = (TCG_TARGET_REG_BITS == 64 || d_type == TCG_TYPE_I32
+ ? 0 : *args++);
addr_regl = *args++;
addr_regh = (TCG_TARGET_REG_BITS < TARGET_LONG_BITS ? *args++ : 0);
oi = *args++;
@@ -1934,10 +1934,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is_64)
} else {
tcg_out_qemu_st_unalign(s, data_regl, data_regh, base, opc);
}
- add_qemu_ldst_label(s, 0, oi,
- (is_64 ? TCG_TYPE_I64 : TCG_TYPE_I32),
- data_regl, data_regh, addr_regl, addr_regh,
- s->code_ptr, label_ptr);
+ add_qemu_ldst_label(s, false, oi, d_type, data_regl, data_regh,
+ addr_regl, addr_regh, s->code_ptr, label_ptr);
#else
if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
tcg_out_ext32u(s, base, addr_regl);
@@ -2425,16 +2423,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_qemu_ld_i32:
- tcg_out_qemu_ld(s, args, false);
+ tcg_out_qemu_ld(s, args, TCG_TYPE_I32);
break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, args, true);
+ tcg_out_qemu_ld(s, args, TCG_TYPE_I64);
break;
case INDEX_op_qemu_st_i32:
- tcg_out_qemu_st(s, args, false);
+ tcg_out_qemu_st(s, args, TCG_TYPE_I32);
break;
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, args, true);
+ tcg_out_qemu_st(s, args, TCG_TYPE_I64);
break;
case INDEX_op_add2_i32:
--
2.34.1
