> -----Original Message-----
> From: Akihiko Odaki <akihiko.od...@daynix.com>
> Sent: Friday, 14 April 2023 13:37
> Cc: Sriram Yagnaraman <sriram.yagnara...@est.tech>; Jason Wang
> <jasow...@redhat.com>; Dmitry Fleytman <dmitry.fleyt...@gmail.com>;
> Michael S. Tsirkin <m...@redhat.com>; Alex Bennée <alex.ben...@linaro.org>;
> Philippe Mathieu-Daudé <phi...@linaro.org>; Thomas Huth
> <th...@redhat.com>; Wainer dos Santos Moschetta
> <waine...@redhat.com>; Beraldo Leal <bl...@redhat.com>; Cleber Rosa
> <cr...@redhat.com>; Laurent Vivier <lviv...@redhat.com>; Paolo Bonzini
> <pbonz...@redhat.com>; qemu-devel@nongnu.org; Akihiko Odaki
> <akihiko.od...@daynix.com>
> Subject: [PATCH 29/40] igb: Implement MSI-X single vector mode
>
> Signed-off-by: Akihiko Odaki <akihiko.od...@daynix.com>
> ---
> hw/net/igb_core.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index
> 429b0ebc03..2013a9a53d 100644
> --- a/hw/net/igb_core.c
> +++ b/hw/net/igb_core.c
> @@ -1870,7 +1870,7 @@ igb_update_interrupt_state(IGBCore *core)
>
> icr = core->mac[ICR] & core->mac[IMS];
>
> - if (msix_enabled(core->owner)) {
> + if (core->mac[GPIE] & E1000_GPIE_MSIX_MODE) {
> if (icr) {
> causes = 0;
> if (icr & E1000_ICR_DRSTA) { @@ -1905,7 +1905,12 @@
> igb_update_interrupt_state(IGBCore *core)
> trace_e1000e_irq_pending_interrupts(core->mac[ICR] & core->mac[IMS],
> core->mac[ICR], core->mac[IMS]);
>
> - if (msi_enabled(core->owner)) {
> + if (msix_enabled(core->owner)) {
> + if (icr) {
> + trace_e1000e_irq_msix_notify_vec(0);
> + msix_notify(core->owner, 0);
> + }
> + } else if (msi_enabled(core->owner)) {
> if (icr) {
> msi_notify(core->owner, 0);
> }
> --
> 2.40.0
Reviewed-by: Sriram Yagnaraman <sriram.yagnara...@est.tech>
