Add CSR_CPUID register in cpu_env to save the cpu_index value. Signed-off-by: Tianrui Zhao <zhaotian...@loongson.cn> --- target/loongarch/cpu.c | 1 + target/loongarch/cpu.h | 1 + target/loongarch/insn_trans/trans_privileged.c.inc | 8 +------- 3 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 97e6579f6a..bee5949ed2 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -486,6 +486,7 @@ static void loongarch_cpu_reset_hold(Object *obj) env->CSR_ESTAT = env->CSR_ESTAT & (~MAKE_64BIT_MASK(0, 2)); env->CSR_RVACFG = FIELD_DP64(env->CSR_RVACFG, CSR_RVACFG, RBITS, 0); + env->CSR_CPUID = cs->cpu_index; env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0); env->CSR_LLBCTL = FIELD_DP64(env->CSR_LLBCTL, CSR_LLBCTL, KLO, 0); env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0); diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e11c875188..1d9a4009b9 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -288,6 +288,7 @@ typedef struct CPUArchState { uint64_t CSR_PWCH; uint64_t CSR_STLBPS; uint64_t CSR_RVACFG; + uint64_t CSR_CPUID; uint64_t CSR_PRCFG1; uint64_t CSR_PRCFG2; uint64_t CSR_PRCFG3; diff --git a/target/loongarch/insn_trans/trans_privileged.c.inc b/target/loongarch/insn_trans/trans_privileged.c.inc index 5a04352b01..d1d98c6e9e 100644 --- a/target/loongarch/insn_trans/trans_privileged.c.inc +++ b/target/loongarch/insn_trans/trans_privileged.c.inc @@ -99,13 +99,7 @@ static const CSRInfo csr_info[] = { CSR_OFF(PWCH), CSR_OFF(STLBPS), CSR_OFF(RVACFG), - [LOONGARCH_CSR_CPUID] = { - .offset = (int)offsetof(CPUState, cpu_index) - - (int)offsetof(LoongArchCPU, env), - .flags = CSRFL_READONLY, - .readfn = NULL, - .writefn = NULL - }, + CSR_OFF_FLAGS(CPUID, CSRFL_READONLY), CSR_OFF_FLAGS(PRCFG1, CSRFL_READONLY), CSR_OFF_FLAGS(PRCFG2, CSRFL_READONLY), CSR_OFF_FLAGS(PRCFG3, CSRFL_READONLY), -- 2.31.1