On Wed, 3 May 2023 at 08:10, Richard Henderson <richard.hender...@linaro.org> wrote: > > Always reserve r3 for tlb softmmu lookup. Fix a bug in user-only > ALL_QLDST_REGS, in that r14 is clobbered by the BLNE that leads > to the misaligned trap. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > ---
> /* > - * r0-r2 will be overwritten when reading the tlb entry (softmmu only) > - * and r0-r1 doing the byte swapping, so don't use these. > - * r3 is removed for softmmu to avoid clashes with helper arguments. > + * r0-r3 will be overwritten when reading the tlb entry (softmmu only); > + * r14 will be overwritten by the BLNE branching to the slow path. > */ > #ifdef CONFIG_SOFTMMU > -#define ALL_QLOAD_REGS \ > +#define ALL_QLDST_REGS \ > (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ > (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \ > (1 << TCG_REG_R14))) > -#define ALL_QSTORE_REGS \ > - (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ > - (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \ > - ((TARGET_LONG_BITS == 64) << TCG_REG_R3))) > #else > -#define ALL_QLOAD_REGS ALL_GENERAL_REGS > -#define ALL_QSTORE_REGS \ > - (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1))) > +#define ALL_QLDST_REGS (ALL_GENERAL_REGS & ~(1 << TCG_REG_R14)) > #endif Why is it OK not to remove r0 and r1 from this any more ? The commit message doesn't say anything about this bit of the change. -- PMM
