On Fri, 19 May 2023 at 15:19, Jonathan Cameron via <qemu-devel@nongnu.org> wrote: > > From: Ira Weiny <ira.we...@intel.com> > > CXL has 24 bit unaligned fields which need to be stored to. CXL is > specified as little endian. > > Define st24_le_p() and the supporting functions to store such a field > from a 32 bit host native value. > > The use of b, w, l, q as the size specifier is limiting. So "24" was > used for the size part of the function name. > > Signed-off-by: Ira Weiny <ira.we...@intel.com> > Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com> > --- > docs/devel/loads-stores.rst | 1 + > include/qemu/bswap.h | 27 +++++++++++++++++++++++++++ > 2 files changed, 28 insertions(+) > > diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst > index d2cefc77a2..82a79e91d9 100644 > --- a/docs/devel/loads-stores.rst > +++ b/docs/devel/loads-stores.rst > @@ -36,6 +36,7 @@ store: ``st{size}_{endian}_p(ptr, val)`` > ``size`` > - ``b`` : 8 bits > - ``w`` : 16 bits > + - ``24`` : 24 bits > - ``l`` : 32 bits > - ``q`` : 64 bits
Can you also update the "Regexes for git grep" section below to account for the new size value, please? thanks -- PMM