On 6/22/23 12:49, Cédric Le Goater wrote:
On 6/22/23 12:06, Cédric Le Goater wrote:
On 6/22/23 11:33, Nicholas Piggin wrote:
PPC TCG supports SMT CPU configurations for non-hypervisor state, so
permit POWER8-10 pseries machines to enable SMT.
This requires PIR and TIR be set, because that's how sibling thread
matching is done by TCG.
spapr's nested-HV capability does not currently coexist with SMT, so
that combination is prohibited (interestingly somewhat analogous to
LPAR-per-core mode on real hardware which also does not support KVM).
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
hw/ppc/spapr.c | 16 ++++++++++++----
hw/ppc/spapr_caps.c | 14 ++++++++++++++
hw/ppc/spapr_cpu_core.c | 7 +++++--
3 files changed, 31 insertions(+), 6 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8e7d497f25..677b5eef9d 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2525,10 +2525,18 @@ static void spapr_set_vsmt_mode(SpaprMachineState
*spapr, Error **errp)
int ret;
unsigned int smp_threads = ms->smp.threads;
- if (tcg_enabled() && (smp_threads > 1)) {
- error_setg(errp, "TCG cannot support more than 1 thread/core "
- "on a pseries machine");
- return;
+ if (tcg_enabled()) {
I will add :
if (smp_threads > 1 &&
No need to resend for that.
and
Reviewed-by: Cédric Le Goater <c...@kaod.org>
Thanks,
C.
