This patch includes:
- XVSAT.{B/H/W/D}[U].
Signed-off-by: Song Gao <gaos...@loongson.cn>
---
target/loongarch/disas.c | 9 +++++++++
target/loongarch/insn_trans/trans_lasx.c.inc | 9 +++++++++
target/loongarch/insns.decode | 9 +++++++++
target/loongarch/vec_helper.c | 10 ++++++----
4 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 72df9f0b08..09e5981fc3 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -1979,6 +1979,15 @@ INSN_LASX(xvmod_hu, vvv)
INSN_LASX(xvmod_wu, vvv)
INSN_LASX(xvmod_du, vvv)
+INSN_LASX(xvsat_b, vv_i)
+INSN_LASX(xvsat_h, vv_i)
+INSN_LASX(xvsat_w, vv_i)
+INSN_LASX(xvsat_d, vv_i)
+INSN_LASX(xvsat_bu, vv_i)
+INSN_LASX(xvsat_hu, vv_i)
+INSN_LASX(xvsat_wu, vv_i)
+INSN_LASX(xvsat_du, vv_i)
+
INSN_LASX(xvreplgr2vr_b, vr)
INSN_LASX(xvreplgr2vr_h, vr)
INSN_LASX(xvreplgr2vr_w, vr)
diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc
b/target/loongarch/insn_trans/trans_lasx.c.inc
index 0064ffa6cb..75bb216cd6 100644
--- a/target/loongarch/insn_trans/trans_lasx.c.inc
+++ b/target/loongarch/insn_trans/trans_lasx.c.inc
@@ -361,6 +361,15 @@ TRANS(xvmod_hu, gen_vvv, 32, gen_helper_vmod_hu)
TRANS(xvmod_wu, gen_vvv, 32, gen_helper_vmod_wu)
TRANS(xvmod_du, gen_vvv, 32, gen_helper_vmod_du)
+TRANS(xvsat_b, gvec_vv_i, 32, MO_8, do_vsat_s)
+TRANS(xvsat_h, gvec_vv_i, 32, MO_16, do_vsat_s)
+TRANS(xvsat_w, gvec_vv_i, 32, MO_32, do_vsat_s)
+TRANS(xvsat_d, gvec_vv_i, 32, MO_64, do_vsat_s)
+TRANS(xvsat_bu, gvec_vv_i, 32, MO_8, do_vsat_u)
+TRANS(xvsat_hu, gvec_vv_i, 32, MO_16, do_vsat_u)
+TRANS(xvsat_wu, gvec_vv_i, 32, MO_32, do_vsat_u)
+TRANS(xvsat_du, gvec_vv_i, 32, MO_64, do_vsat_u)
+
TRANS(xvreplgr2vr_b, gvec_dup, 32, MO_8)
TRANS(xvreplgr2vr_h, gvec_dup, 32, MO_16)
TRANS(xvreplgr2vr_w, gvec_dup, 32, MO_32)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index fa25c876b4..e366cf7615 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -1562,6 +1562,15 @@ xvmod_hu 0111 01001110 01101 ..... ..... .....
@vvv
xvmod_wu 0111 01001110 01110 ..... ..... ..... @vvv
xvmod_du 0111 01001110 01111 ..... ..... ..... @vvv
+xvsat_b 0111 01110010 01000 01 ... ..... ..... @vv_ui3
+xvsat_h 0111 01110010 01000 1 .... ..... ..... @vv_ui4
+xvsat_w 0111 01110010 01001 ..... ..... ..... @vv_ui5
+xvsat_d 0111 01110010 0101 ...... ..... ..... @vv_ui6
+xvsat_bu 0111 01110010 10000 01 ... ..... ..... @vv_ui3
+xvsat_hu 0111 01110010 10000 1 .... ..... ..... @vv_ui4
+xvsat_wu 0111 01110010 10001 ..... ..... ..... @vv_ui5
+xvsat_du 0111 01110010 1001 ...... ..... ..... @vv_ui6
+
xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @vr
xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @vr
xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @vr
diff --git a/target/loongarch/vec_helper.c b/target/loongarch/vec_helper.c
index 7b2433c962..d57fd958a8 100644
--- a/target/loongarch/vec_helper.c
+++ b/target/loongarch/vec_helper.c
@@ -653,12 +653,13 @@ VDIV(vmod_du, 64, UD, DO_REMU)
#define VSAT_S(NAME, BIT, E) \
void HELPER(NAME)(void *vd, void *vj, uint64_t max, uint32_t v) \
{ \
- int i; \
+ int i, len; \
VReg *Vd = (VReg *)vd; \
VReg *Vj = (VReg *)vj; \
typedef __typeof(Vd->E(0)) TD; \
\
- for (i = 0; i < LSX_LEN/BIT; i++) { \
+ len = (simd_oprsz(v) == 16) ? LSX_LEN : LASX_LEN; \
+ for (i = 0; i < len / BIT; i++) { \
Vd->E(i) = Vj->E(i) > (TD)max ? (TD)max : \
Vj->E(i) < (TD)~max ? (TD)~max: Vj->E(i); \
} \
@@ -672,12 +673,13 @@ VSAT_S(vsat_d, 64, D)
#define VSAT_U(NAME, BIT, E) \
void HELPER(NAME)(void *vd, void *vj, uint64_t max, uint32_t v) \
{ \
- int i; \
+ int i, len; \
VReg *Vd = (VReg *)vd; \
VReg *Vj = (VReg *)vj; \
typedef __typeof(Vd->E(0)) TD; \
\
- for (i = 0; i < LSX_LEN/BIT; i++) { \
+ len = (simd_oprsz(v) == 16) ? LSX_LEN : LASX_LEN; \
+ for (i = 0; i < len / BIT; i++) { \
Vd->E(i) = Vj->E(i) > (TD)max ? (TD)max : Vj->E(i); \
} \
}
--
2.39.1
