On 8/9/23 01:26, Jiajie Chen wrote:
When running in VA32 mode(!LA64 or VA32L[1-3] matching PLV), virtual
address is truncated to 32 bits before address mapping.
Signed-off-by: Jiajie Chen<c...@jia.je>
Co-authored-by: Richard Henderson<richard.hender...@linaro.org>
---
target/loongarch/cpu.c | 16 ++++----
target/loongarch/cpu.h | 9 +++++
target/loongarch/gdbstub.c | 2 +-
.../loongarch/insn_trans/trans_atomic.c.inc | 5 ++-
.../loongarch/insn_trans/trans_branch.c.inc | 3 +-
.../loongarch/insn_trans/trans_fmemory.c.inc | 30 ++++-----------
target/loongarch/insn_trans/trans_lsx.c.inc | 38 +++++--------------
.../loongarch/insn_trans/trans_memory.c.inc | 34 +++++------------
target/loongarch/op_helper.c | 4 +-
target/loongarch/translate.c | 32 ++++++++++++++++
10 files changed, 85 insertions(+), 88 deletions(-)
Much better, thanks.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
