On Mon, Sep 18, 2023 at 04:02:57PM +0100, Jonathan Cameron wrote:
> From: Dmitry Frolov <fro...@swemel.ru>
>
> According to cxl_interleave_ways_enc(), fw->num_targets is allowed to be up
> to 16. This also corresponds to CXL r3.0 spec. So, the fw->target_hbs[]
> array is iterated from 0 to 15. But it is staticaly declared of length 8.
s/staticaly/statically/
Fan
> Thus, out of bound array access may occur.
>
> Fixes: c28db9e000 ("hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from
> TYPE_PXB_DEV")
> Signed-off-by: Dmitry Frolov <fro...@swemel.ru>
> Reviewed-by: Michael Tokarev <m...@tls.msk.ru>
> Link:
> https://urldefense.com/v3/__https://lore.kernel.org/r/20230913101055.754709-1-frolov@swemel.ru__;!!EwVzqGoTKBqv-0DWAJBm!RYOYJeMCX_mlzCETIKjHDYun2TZCQxC7wF1SxIdUwJ3BYbDOtmDpTaVXXiQgiFwLYI_4JAnU6Asem4T0aHKzwzPJWer7$
>
> Cc: qemu-sta...@nongnu.org
> Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
> ---
> include/hw/cxl/cxl.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
> index 56c9e7676e..4944725849 100644
> --- a/include/hw/cxl/cxl.h
> +++ b/include/hw/cxl/cxl.h
> @@ -29,7 +29,7 @@ typedef struct PXBCXLDev PXBCXLDev;
> typedef struct CXLFixedWindow {
> uint64_t size;
> char **targets;
> - PXBCXLDev *target_hbs[8];
> + PXBCXLDev *target_hbs[16];
> uint8_t num_targets;
> uint8_t enc_int_ways;
> uint8_t enc_int_gran;
> --
> 2.39.2
>
