On 9/21/23 14:54, Peter Maydell wrote:
FEAT_HPMN0 is a small feature which defines that it is valid for
MDCR_EL2.HPMN to be set to 0, meaning "no PMU event counters provided
to an EL1 guest" (previously this setting was reserved). QEMU's
implementation almost gets HPMN == 0 right, but we need to fix
one check in pmevcntr_is_64_bit(). That is enough for us to
advertise the feature in the 'max' CPU.

(We don't need to make the behaviour conditional on feature
presence, because the FEAT_HPMN0 behaviour is within the range
of permitted UNPREDICTABLE behaviour for a non-FEAT_HPMN0

Signed-off-by: Peter Maydell<peter.mayd...@linaro.org>
  docs/system/arm/emulation.rst | 1 +
  target/arm/helper.c           | 2 +-
  target/arm/tcg/cpu32.c        | 4 ++++
  target/arm/tcg/cpu64.c        | 1 +
  4 files changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


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