On 10/17/23 04:52, Philippe Mathieu-Daudé wrote:
On 13/10/23 19:51, Richard Henderson wrote:
We have tcg_gen_qemu_{ld,st}_i128, which can be used to implement
load/store of vectors to guest memory. But at present we have to
split into, or concatenated from, two i64 to reference the guest
vector register backing store within env.
Provide tcg_gen_{ld,st}_i128, which can avoid the trip through i64.
This does require that the target store i128 in host byte ordering,
which is true of i386 (and some other backends) but not arm or s390x.
There is definitely further cleanup possible.
Is hexagon gen_vreg_load() candidate?
Yes.
r~