On 10/20/23 06:24, Jason Wang wrote:
On Tue, Aug 29, 2023 at 5:06 PM Cédric Le Goater <[email protected]> wrote:

From: Cédric Le Goater <[email protected]>

The Intel 82576EB GbE Controller say that the Physical and Virtual
Functions support Function Level Reset. Add the capability to each
device model.


Do we need to do migration compatibility for this?

Yes. it does. the config space is now different.

Thanks,

C.



Thanks

Cc:  Sriram Yagnaraman <[email protected]>
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Reviewed-by: Akihiko Odaki <[email protected]>
Tested-by: Akihiko Odaki <[email protected]>
Signed-off-by: Cédric Le Goater <[email protected]>
---
  hw/net/igb.c   | 3 +++
  hw/net/igbvf.c | 3 +++
  2 files changed, 6 insertions(+)

diff --git a/hw/net/igb.c b/hw/net/igb.c
index e70a66ee038e..b8c170ad9b1a 100644
--- a/hw/net/igb.c
+++ b/hw/net/igb.c
@@ -101,6 +101,7 @@ static void igb_write_config(PCIDevice *dev, uint32_t addr,

      trace_igb_write_config(addr, val, len);
      pci_default_write_config(dev, addr, val, len);
+    pcie_cap_flr_write_config(dev, addr, val, len);

      if (range_covers_byte(addr, len, PCI_COMMAND) &&
          (dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
@@ -433,6 +434,8 @@ static void igb_pci_realize(PCIDevice *pci_dev, Error 
**errp)
      }

      /* PCIe extended capabilities (in order) */
+    pcie_cap_flr_init(pci_dev);
+
      if (pcie_aer_init(pci_dev, 1, 0x100, 0x40, errp) < 0) {
          hw_error("Failed to initialize AER capability");
      }
diff --git a/hw/net/igbvf.c b/hw/net/igbvf.c
index 07343fa14a89..55e321e4ec20 100644
--- a/hw/net/igbvf.c
+++ b/hw/net/igbvf.c
@@ -204,6 +204,7 @@ static void igbvf_write_config(PCIDevice *dev, uint32_t 
addr, uint32_t val,
  {
      trace_igbvf_write_config(addr, val, len);
      pci_default_write_config(dev, addr, val, len);
+    pcie_cap_flr_write_config(dev, addr, val, len);
  }

  static uint64_t igbvf_mmio_read(void *opaque, hwaddr addr, unsigned size)
@@ -266,6 +267,8 @@ static void igbvf_pci_realize(PCIDevice *dev, Error **errp)
          hw_error("Failed to initialize PCIe capability");
      }

+    pcie_cap_flr_init(dev);
+
      if (pcie_aer_init(dev, 1, 0x100, 0x40, errp) < 0) {
          hw_error("Failed to initialize AER capability");
      }
--
2.41.0





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