Hi, Are these lines to be changed accordingly for my compatible https://github.com/qemu/qemu/blob/stable-4.2/target/arm/helper.c#L9842-#L9852 or is it fixed?
BR. Abhijeet. On Tue, 7 Dec, 2021, 13:29 abhijeet inamdar, <abhijeetinamdar3...@gmail.com> wrote: > The only difference I found is that at the 0x0 we have ROM for the first > and SRAM for the latter. > > As you said to build the hardware as it is it hard to get the exact > size/address of Flash and RAM or the range of them which I think is the > main issue. > > BR. > Abhijeet. > > On Tue, 7 Dec, 2021, 11:12 Peter Maydell, <peter.mayd...@linaro.org> > wrote: > >> On Tue, 7 Dec 2021 at 09:23, abhijeet inamdar >> <abhijeetinamdar3...@gmail.com> wrote: >> > >> > And we have two memory map one at the boot time and other is the normal >> memory map. There is slight chance in the size/addresses. My doubt is which >> do mapping do we usually follow? >> >> The rule of thumb is: model what the real hardware does. >> If that means "we have one mapping at boot time and then >> at runtime there's some register that changes the mapping", >> then model that. >> >> That said, sometimes if the two maps are very similar, or if >> in fact you know the guest you care about never does whatever >> the thing is to change the memory map, then you can get away >> with only modelling one of them. >> >> -- PMM >> >
