Hi everyone, I'm trying to create a custom riscv64 machine that uses Linux SHMEM for its RAM. Currently I've managed to boot the machine with one core, register the SHMEM as RAM, load a baremetal image into the SHMEM and run the core from the start of the loaded firmware. The firmware just writes to some address in the SHMEM which I can read from later, nothing fancy.
What I'm wondering is if there is a way to delay the start of the core and have it happen at some point during runtime with some kind of signal instead of when the machine gets started? At the start I need to hold the core in reset. In the end the QEMU instance shouldn't load the image at all, another process is responsible for writing the firmware into the SHMEM and it should signal the emulator to set the resetvec value and start or stop the core whenever it wants. That other process will most likely be a python script or another QEMU instance. This will later also scale to multiple cores, with each running independently (can be started or stopped individually) but will still share the RAM from the file. This is what I have so far: https://github.com/kostic-vladimir/qemu/tree/custom-riscv64. I'm pretty new to QEMU and emulators in general. Regards, Vladimir
