Hi,

as promised, here comes an update on the Motorola Coldfire 4e CPU. Now 
it's official, the next Coldfire generation is out, documentation can be 
found at:

e-www.motorola.com/webapp/sps/site/taxonomy.jsp?nodeId=016246PCbf00M9

The probably most interesting variant is the MCF5474. It has integrated:
- 266 MHz core
- MMU
- Double precision FPU 
- 32 KB Instruction Cache + 32 KB Data Cache
- 32 KB on-chip SRAM 
- Timers
- DDR SDRAM Controller
- Four serial ports
- Two 10/100 Fast Ethernet Controllers, external transceiver required
- USB 2.0 device (not host)
- PCI 2.2 interface
- SPI
- I2C
- DMA controller 

Note that this Coldfire generation can still _not_ offer full 68k 
compatibility, even _with_ the emulation library. The reason is, that some 
instructions with the same opcode as 68k, but different behaviour, can not 
be trapped. If I remember correctly from earlier considerations, this 
would not affect C68 generated code, but existing QL assembler software, 
including the operating systems.

However this CPU allows to implement the QL operating system _interfaces_ 
without any changes. This is a major advantage to all other non-68k 
architectures, when native implementations are considered.

All the best
Peter

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