On Tue, Aug 24, 2004 at 01:37:17AM +0200, Thierry Godefroy wrote:

> MC68060RC60 are available... MC, not XC. Of course, I can't prove they
> were available back in 2001, but that's beyond the point as even a RC50
> could have been overclocked to 66MHz...

isn't RC the version without FPU and MMU?

> I don't care about other processors, but if you remember all the fuss that
> was made about just -one- bug in the Pentium FPU (the "divide bug", I bet
> that Motorola was lucky that their processor was not as popular as the
> Pentium... 

that would seem so. It is not just the 68060, 68040 has its problems
too. As soon as you do things like MMU and cache your path is paved
with workarounds for CPU bugs - and those guys who were doing SMP
with m68k machines must really have white hair by now.

Not to mention that the basic design of the MMU and cache is already
extremely unforgiving.. Linux on 68060 has been debugged for almost
a decade now and we are still finding cache and MMU related bugs.

> I'm searching the proofs, but when you got a processor that can choke on as
> simple a code as:
> 
>            .../...
>            Bcc LABEL_BANG
>            .../...
> 
> LABEL_BANG MOVE An,USP                   <--- I11 errata: USP corrupted !

its SV mode code so you can reasonably work around by software. Have
you actually seen QDOS code that would trigger that?

The really worst bug is I16, except that is likely to be triggered
only by intent. 

I did repeatedly look through the other bugs and don't think they would
be triggered in QDOS code.
Eg I could not think of any real life conditions where QDOS code would
trigger I14.. now gcc has advanced to stage of producing such broken
code.

Richard

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