Hal Murray wrote:
In article <[email protected]>,
 unruh <[email protected]> writes:

Further to my kernel pps problems. I have now managed to get pps-ldisc
which is supposed to timestamp the serial port DCD transition interrupt,
and the pps_parport. In the case of the latter I was wondering if anyone
has any idea of how it works. The on board parallel port interface on
old motherboards used the edge transition to signal the interrupt. This
would mean that once the routine had serviced the interrupt, no other
one would occur until that next edge. However, for the add in parallal
cards, they use shareable, level triggered interrupts. Since the input pulse is
many ms long, this means that the interrupt keeps triggering about once
every usec as long as the ack line is up. Does anyone know if the pps_parport module treats such shareable
interrupts correctly?


Usually, that sort of hardware has a way to turn off the interrupt.
It's something like you write a bit in a register to "ACK" that
interrupt.  When the external signal turns off, it clears that bit.

The info should be in the fine print if you can get a good data sheet.

The interrupt controller works differently.
you switch from edge triggered to level triggered.

uwe

_______________________________________________
questions mailing list
[email protected]
http://lists.ntp.org/listinfo/questions

Reply via email to