We have position with our direct client.  Please reply to van...@miracleus.com.

Please let me know if you are interested for this position.

Location : Allentown,PA

Rate : Open

Length: 6 Months +

Digital Design Verification - Job Description

Job Responsibilities
Duties will include working within a Product Development Team to
develop digital ICs for use within communications devices. This job
will encompass various aspects of FPGA design and bring up for
verification. Candidate may be involved in upfront planning &
scheduling activities. As a member of a design team, candidate will be
expected to actively participate in the design process from concept to
product launch to ensure success.

Functional/Industry Knowledge


·         4+ years experience in FPGA

·         Experience in FPGA synthesis, mapping to FPGA devices and bring up

·         Experience in developing test plans based on specifications
and requirements

·         Strong knowledge of functional verification tools and methodology

·         RTL design for FPGA

·         Experience developing verification components, large
verification environments and tests for complex blocks

·         Familiar with processor based SoC verification environments

·         Strong programming skills including object oriented approaches

·         Familiarity  with revision control environments such as ClearCase

·         Strong written and verbal communication skills

·         Languages: VHDL, Verilog, Perl, C, Specman e

·         Tools: ModelSim, Synplify, Quartus,

Required Degree: BS
Preferred Degree: MS
Preferred Major: Electrical Engineering or related discipline

Vanita Asawa
Miracle Software Inc
4 Walter E Foran Blvd, Suite 206
NJ - 08822
Ph: 908-782-0002 Ext. 221
Fax :908-782-2765

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