Hello,
Just a suggestion:
Would it be possible to fix the Makefiles so that $(SILENT) is used
instead of @ for _anything_ but '@echo "xxx"' and "@$(MAKE)..." ?
Normally, we should be able to use "make V=1" to see what "make"
actually does (i.e. commands that you can cut and paste in a shell), but
this becomes less and less the case. Some time ago, I think the rockbox
Makefiles were designed that way.
I have a patch ready, of course, but you'd spend more time verifying it
that doing a quick
fgrep -r @$ .
in the rockbox sources, and find/replace.
The commands affected are mainly
$(CC) (not all of them, of course)
$(OC)
$(DLLTOOL)
$(DLLWRAP)
$(AR)
$(RANLIB)
Cheers,
Fred
