Do you mean the YPR0? That's what it's based on. The SI470x can generate interrupts, but I don't think its interrupt port is connected to the CPU on the Clip+.
On Sat, Dec 8, 2012 at 2:24 AM, Lorenzo Miori <memory...@gmail.com> wrote: > You should have a look at R0's RDS implementation...it sound very similar. > Moreover SI47xx can generate interrupt to the CPU ;)