Maybe it is just me, but l2c looks very close to i2c which might cause some confusion.
On Wed, Feb 26, 2014 at 10:52 AM, Sebastian Huber <sebastian.hu...@embedded-brains.de> wrote: > --- > c/src/lib/libbsp/sparc/shared/include/grlib.h | 25 > +++++++++++++++++++++++++ > 1 files changed, 25 insertions(+), 0 deletions(-) > > diff --git a/c/src/lib/libbsp/sparc/shared/include/grlib.h > b/c/src/lib/libbsp/sparc/shared/include/grlib.h > index 9c45038..5a1449f 100644 > --- a/c/src/lib/libbsp/sparc/shared/include/grlib.h > +++ b/c/src/lib/libbsp/sparc/shared/include/grlib.h > @@ -88,6 +88,31 @@ struct grgpio_regs { > volatile unsigned int bypass; /* 0x18 Bypass register */ > }; > > +/* L2C - Level 2 Cache Controller registers */ > +struct l2c_regs { > + volatile unsigned int control; > + volatile unsigned int status; > + volatile unsigned int flush_mem_addr; > + volatile unsigned int flush_set_index; > + volatile unsigned int access_counter; > + volatile unsigned int hit_counter; > + volatile unsigned int bus_cycle_counter; > + volatile unsigned int bus_usage_counter; > + volatile unsigned int error_status_control; > + volatile unsigned int error_addr; > + volatile unsigned int tag_check_bit; > + volatile unsigned int data_check_bit; > + volatile unsigned int scrub_control_status; > + volatile unsigned int scrub_delay; > + volatile unsigned int error_injection; > + volatile unsigned int reserved_3c[17]; > + volatile unsigned int mtrr; > + volatile unsigned int reserved_84[131039]; > + volatile unsigned int diag_iface_tag[16384]; > + volatile unsigned int reserved_90000[376832]; > + volatile unsigned int diag_iface_data[524288]; > +}; > + > #ifdef __cplusplus > } > #endif > -- > 1.7.7 > > _______________________________________________ > rtems-devel mailing list > rtems-devel@rtems.org > http://www.rtems.org/mailman/listinfo/rtems-devel _______________________________________________ rtems-devel mailing list rtems-devel@rtems.org http://www.rtems.org/mailman/listinfo/rtems-devel