Hello,
there is a fix for the ERC32 with FPU rev.B or rev.C in the SPARC interrupt
entry code:
http://git.rtems.org/rtems/tree/c/src/lib/libbsp/sparc/shared/irq_asm.S#n426
Exists there systems with such a processor? Is it reasonable to ship RTEMS
4.11 or later on such a system?
I would like to remove this code block.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
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Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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