See also
https://sourceware.org/ml/binutils/2014-06/msg00059.html
On Fri, Jun 06, 2014 at 11:01:10AM +0200, Sebastian Huber wrote:
> I performed a git bisect and found this:
>
> 93d1b056cb396d6468781fe0e40dd769891bed32 is the first bad commit
> commit 93d1b056cb396d6468781fe0e40dd769891bed32
> Author: Alan Modra <amo...@gmail.com>
> Date: Tue May 20 11:42:42 2014 +0930
>
> Rewrite ppc32 backend .sdata and .sdata2 handling
Hmm, I'm surprised that your git bisect found this patch. Was
_SDA_BASE_ set differently before this?
> 0x00000000000dfc00 _SDA_BASE_
> 0x00000000000d7f78 ppc_exc_lock_std
> 4b8: 28 05 00 00 cmplwi r5,0
> 4ba: R_PPC_SDAREL16 ppc_exc_lock_std
ppc_exc_lock_std@sdarel will be calculating 0xd7f78 - 0xdfc00
which is 0xf...fff8378, and that falls foul of
commit 86c9573369616e7437481b6e5533aef3a435cdcf
Author: Alan Modra <amo...@gmail.com>
Date: Sat Mar 8 13:05:06 2014 +1030
Better overflow checking for powerpc32 relocations
cmplwi has an *unsigned* 16-bit field, and we now check the overflow
properly.
I wonder how many more of these we'll hit, and whether the uproar will
be enough that I'll be forced to relax the checks?
---
.../new-exceptions/bspsupport/ppc_exc_asm_macros.h | 25 +++++++++++--------
1 files changed, 14 insertions(+), 11 deletions(-)
diff --git
a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
index 0e3bc96..bdcfb78 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
@@ -147,8 +147,9 @@ ppc_exc_min_prolog_sync_\_NAME:
* MACRO: TEST_1ST_OPCODE_crit
*****************************************************************************
*
- * USES: REG, cr0
- * ON EXIT: REG available (contains *pc - STW_R1_R13(0)),
+ * USES: REG, REG2, cr0
+ * ON EXIT: REG available (contains *pc),
+ * REG2 available (contains 'stw r1, ppc_exc_lock_std@sdarel(r13)')
* return value in cr0.
*
* test opcode interrupted by critical (asynchronous) exception; set CR_LOCK if
@@ -156,19 +157,21 @@ ppc_exc_min_prolog_sync_\_NAME:
* *SRR0 == 'stw r1, ppc_exc_lock_std@sdarel(r13)'
*
*/
- .macro TEST_1ST_OPCODE_crit _REG
+ .macro TEST_1ST_OPCODE_crit _REG _REG2
lwz \_REG, SRR0_FRAME_OFFSET(FRAME_REGISTER)
+
+ /* set lower 16bits of 'stw r1, ppc_exc_lock_std@sdarel(r13)'
instruction */
+ addi \_REG2, r0, ppc_exc_lock_std@sdarel
+ rlwinm \_REG2, \_REG2, 0, 16, 31
+
lwz \_REG, 0(\_REG)
/* opcode now in REG */
- /* subtract upper 16bits of 'stw r1, 0(r13)' instruction */
- subis \_REG, \_REG, STW_R1_R13(0)@h
- /*
- * if what's left compares against the 'ppc_exc_lock_std@sdarel'
- * address offset then we have a match...
- */
- cmplwi cr0, \_REG, ppc_exc_lock_std@sdarel
+ /* set upper 16bits of 'stw r1, ppc_exc_lock_std@sdarel(r13)'
instruction */
+ oris \_REG2, \_REG2, STW_R1_R13(0)@h
+
+ cmpw cr0, \_REG, \_REG2
.endm
@@ -215,7 +218,7 @@ ppc_exc_min_prolog_sync_\_NAME:
* instruction which sets the lock; check this case by looking at the
* opcode present at the interrupted PC location.
*/
- TEST_1ST_OPCODE_crit _REG=SCRATCH_REGISTER_0
+ TEST_1ST_OPCODE_crit _REG=SCRATCH_REGISTER_0 _REG2=SCRATCH_REGISTER_1
/*
* At this point cr0 is set if
*
--
1.7.7
_______________________________________________
rtems-devel mailing list
rtems-devel@rtems.org
http://www.rtems.org/mailman/listinfo/rtems-devel
