I have a few more questions (currently using RTL 0.9K).
1) how are hardware interrupt routines handled by RTL? It appears that
the scheduler is not involved (I don't need it loaded) and it also
appears that floating point works no problem. Are pending interrupts
queued? I seem to run into problems when an interrupt occurs
while I am inside the corresponding interrupt routine. Here is a more
exact description:
IRQ IRQ
--------|-----------------|--------------------
t1 t2
---------- ----------
-------------| |--------| |------
I can monitor the clock that triggers the interrupt, and the routine it
triggers toggles a digital line hi/lo on my DAQ board. The very first
thing the interrupt routine does is acknowledge (clear) the interrupt
so another can occur.
In the above case, t1 (IRQ latency) is 6 microseconds, and t2 (rtprocess
duration) is 10 microseconds. The IRQ is generated periodically. I would
_think_ that a theoretical upper limit on how fast the IRQ can be generated
is 1/t2, i.e. as long as the pending IRQ is acted upon. However, it appears
that my upper limit before unpredictable things happen is more like
1/(t1+t2), i.e. if the next interrupt occurs during t2, "bad things happen".
(typically, certain I/O port read writes from a fifo triggered task
stop working, RTL can also lock up). I deduced this by gradually
lowering the clock period until the next IRQ occured overlapping with
the end of the RT process.
Two somewhat related questions:
a) is there any interaction at all between the scheduler/fifo modules (for
periodic and fifo triggered tasks) and hardware interrupt triggered
tasks? In other words, who gets priority? Would a hardware IRQ
interrupt a currently running fifo or periodic task, for example, or
wait until that task is completed? Does the scheduler/fifo know
or care about HW interrupt routines?
b) In version 0.9K, what is the current "clock" source for periodic (via
the scheduler) tasks? The CPU? RTC? I really want to know how fast a
periodic task (via the scheduler, not IRQ) can be run.
Thanks in advance.
(PS: thanks to those who responded about Nat. Inst. boards and IRQ
mappings - things work fine now!)
--
Rob Butera, Postdoctoral Fellow http://mrb.niddk.nih.gov/butera/
Laboratory for Neural Control, NINDS
National Institutes of Health, Bethesda, MD USA
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