Daniel,
That might be true, but I can see quite clearly with my o-scope that the
Interrupts are disabled when an ISR is running. And I need pre-emption of
my lower priority IRS.
I AM USING kernel 2.0.36 RTL version 0.9J . I would rather not upgrade
if I can get preemption working somehow with this version.
I do see in the more recent releases and from looking at the mail archives
that in RTL 2.2 there are specific functions to allow for reentrant ISR's.
My assumption was that I should have the PIC registers available to me and
be able to perform this at a lower level with outb commands. So if anyone
knows the exact sequence I'd love to try it. Or do I need to upgrade. If I
do then I have some questions about doing that so that I will be impacted as
little as possible since this effects 12 embedded machines and 2 other PC's.
ANYONE ??
> -----Original Message-----
> From: daniel sheltraw [SMTP:[EMAIL PROTECTED]]
> Sent: Thursday, May 25, 2000 9:00 AM
> To: [EMAIL PROTECTED]
> Subject: RE: [rtl] FW: HELP --- IRQ Preemption
>
>
> Janet and Cyril
>
> I have been told (can't remember who) that it was not neccessary
> to write an EOI within the RT ISR. I am anxious to see how your question
> is
> resolved.
>
> Daniel
>
> >From: "Estabridis, Janet P" <[EMAIL PROTECTED]>
> >To: "'[EMAIL PROTECTED]'" <[EMAIL PROTECTED]>, "Estabridis, Janet P"
> ><[EMAIL PROTECTED]>, "'RT Linux Group'"
> <[EMAIL PROTECTED]>
> >Subject: RE: [rtl] FW: HELP --- IRQ Preemption
> >Date: Thu, 25 May 2000 06:14:51 -0700
> >
> >Cyril,
> >I tried that. I even found in the PIC data sheet that if you had 2
> >controllers, you needed to do the write twice. That did not work either.
> >Janet
> >
> >
> > > -----Original Message-----
> > > From: Briand Cyril [SMTP:[EMAIL PROTECTED]]
> > > Sent: Wednesday, May 24, 2000 10:27 PM
> > > To: 'Estabridis, Janet P'; 'RT Linux Group'
> > > Subject: RE: [rtl] FW: HELP --- IRQ Preemption
> > >
> > > Maybe you have to write to the PIC the EOI byte (outb(0x20, 0x20)) at
> >the
> > > beginning of your preemptable IRQ4 ISR code.
> > > Cyril.
> > >
> > >
> > >
> > > > -----Original Message-----
> > > > From: Estabridis, Janet P
> > > > Sent: Wednesday, May 24, 2000 6:46 AM
> > > > To: 'RT Linux Group'
> > > > Cc: 'Estabridis - Home'
> > > > Subject: HELP --- IRQ Preemption
> > > >
> > > > Hi,
> > > >
> > > > I'm using RTL V0.9J with 2.0.36.
> > > >
> > > > I have two ISRs in my embedded system. IRQ 3 and IRQ 4
> > > > I am monitoring how long I am in each ISR and what the preemption
> >looks
> > > > like by setting and clearing bits on the parallel port as I enter
> and
> > > exit
> > > > my ISRs. I monitor these lines with an o-scope.
> > > >
> > > > The highest priority ISR (irq 3) NEEDS to run at a very fixed rate
> so
> > > that
> > > > the ISR that grabs the data from the A/D converter FIFO does not
> > > overflow
> > > > causing loss of data. This ISR gets called every 1.6 msec and it
> >takes
> > > > approx. 550 usec to pull the data off.
> > > >
> > > > The lower priority ISR (irq 4) is an RS485 serial interface that is
> >used
> > > > at a lower rate (every 30 Hz, 33.33 msec). However, when it is time
>
> >for
> > > > this ISR to send it's 6 bytes of info it takes approx. 600 usec to
> do
> > > so.
> > > >
> > > > What I expected to see on the o-scope because of the priorities of
> the
> > > > IRQ's is that the lower priority ISR would be preempted when the
> >higher
> > > > priority ISR needed service. BUT this DOES NOT happen and I lose
> data
> > > !!!
> > > >
> > > > I know a simple microcontroller can provide this desired timing
> > > > situation...
> > > >
> > > > I have tried numerous things,
> > > >
> > > > * Writing to the PIC directly to hopefully allow IRQ 4 to be
> preempted
> > > > (outb commands)
> > > > * Using a non-rt Slow ISR as described in Rubini's Device
> Drivers
> > > >
> > > > I have not tried
> > > > * Bottom half ISR as explained in Rubini's book
> > > >
> > > >
> > > > Does anyone out there have experience with this and can tell me
> >EXACTLY
> > > > what I can do?
> > > > Does anyone know if I CAN or CANNOT accomplish this scenario?
> > > >
> > > > Thanks in advance --
> > > >
> > > > Janet Estabridis
> > > > Electrical Engineer
> > > > NAWC Code 473E00D
> > > > Building 31440 Room 1017
> > > > China Lake, CA 93555
> > > > [EMAIL PROTECTED]
> > > > (760) 939-2896 FAX (760) 939 -3075
> > > >
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> >
>
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