On Tue, Dec 12, 2000 at 07:29:23PM -0500, Norm Dresner wrote:
> Can you be more specific about the source of the jitter on the motherboard?
Our measurements show it to be the ISA interface and the use of the 8253/4
timer on the other side of the interface. There is a simple experiment that
we should include in the RTL distribution that does
read cycle timer
read 8253 register
read cycle timer
compute difference
The computed difference was up to 15 microseconds or so when I last did the
experiment on a fast x86.
Our Elan420 boards do much much better.
>
> Norman Dresner
> Fellow Systems Engineer
> Radar Systems Engineering Department
> Electronic Systems and Sensors Segment
> Northrop Grumman Corporation
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>
> At 03:58 PM 12/12/00 -0700, [EMAIL PROTECTED] wrote:
> >It's the motherboard design, not the chip. We get amazing performance
> >on some more integrated chips.
> >
> >On Tue, Dec 12, 2000 at 03:39:12PM -0500, [EMAIL PROTECTED] wrote:
> >>
> >> I've heard from many of you that x86 architecture is fundamentally limited
> >> to no better than a worst case interrupt latency of ~20us. Victor even
> >> alludes to this in his RTLinux White Paper. Does anyone know of a source I
> >> can reference that spells this out in detail with an explanation?
> >>
> >> -Chuck
> >>
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> >Victor Yodaiken
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Victor Yodaiken
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www.fsmlabs.com www.rtlinux.com
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