On 07/05/2005 11:51 PM Jan Kiszka wrote:
> Jan Kiszka wrote:
>>> ...
>>> Also on my MPC860 module I see large calibrated master-to-slave packet
>>> delays. 440 seconds, this looks like an endianess problem or a wrong
>>> (64-bit?) calculation.
>>>
>>
>> Oops. Ok, let's wait for the binary dump - and what Ethereal dissects.
>>
>
> The dump revealed that there is some problem on the master side (you can
> follow this explanations by opening your dump in a recent Ethereal):
>
> The slave sends its calibration requests including a "Transmission Time
> Stamp". This value should be copied by the master on reception into the
> calibration reply frame ("Request Transmission Time"). For unknown
> reasons, this field is always 0 in your dump. All systems I tested so
> far did not show this effect (ok, all were x86). It immediately leads to
> such exorbitant round-trip delays.
>
> Could you try to debug this further? The involved code in the TDMA
> module can be found here:
>
> http://www.rts.uni-hannover.de/rtnet/lxr/source/stack/rtmac/tdma/tdma_proto.c#L261
>
> The copy is performed in line 297. Please check if the value is
> correctly transfered and probably overwritten afterwards (in the 3com
> driver?) or if 0 is already contained in the reply frame.
The value of REQ_CAL_FRM(head)->xmit_stamp) is already 0. The first 10
long-words at "head" are:
head d470c954 head->xmit_stamp d470c958
0x10000102 0x0 0x0 0x95010000 0x0 0x20a10700 0x0 0x0 0x0 0x0
Strange... I also see the same data in the RX buffer of 3com RTnet
driver. More soon...
Thanks.
Wolfgang.
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