Stefan Drissen wrote: > Obviously p is the current program counter value. 56-p will ensure that > the next instruction is then assembled at address 56
I wondered about p being PC, but 56 minus PC (that is about 32797 because of my ORG 32768) didn't make any sense! I now presume that it means pad out the code (with NOPs or whatever) up to address 56 so some code can be there for an IM 1 handler. Is this the Comet assembler? Where does it default to putting the code if it assumes that PC is zero? 32768? I might have a better chance at getting it to build right under the SC_ASSEMBLER or Lerm assembler, if I can remember the directives to use (DISP in one of them I think...). If all else fails I'll pad it out manually! > (also known as the address mode 1 interrupts jump to). ... and I've always thought the reset code was there! Si
