*!! **DIRECT CLIENT NEED* *!!*
*Job Title: ASIC Physical Design Engineer* Location: Hillsboro, OR Duration: 6-12 months Contract Required background: At least 4 years of experience in the following skills - Netlist-GDS flow with Synthesis, Layout (Floorplan, Place and Route, clock tree synthesis), Static Timing Analysis, Formal Verification, Physical Verification(DRC, LVS) and Power Analysis(IR drop, EMIG), Leakage Power Optimization using ICCLR/PTLR flows, on 22nm, 14nm, or lower process technology Desired Tools Experience: Synopsys ICC flow, Prime Time, Design Compiler, Redhawk, LEC/Formality, and Caliber. At least 4 years of experience in Project life cycle activities on development and maintenance projects. At least 4 years of experience in Physical Design and STA review. At least 4 years of experience in ASIC development life cycle. Ability to work in team in diverse/ multiple stakeholder environment *Note: Please reply me on my official E-Mail ID : **[email protected] <[email protected]>* Kindest Regards: Neil Khanna | Lead Professional Recruiter ITBrainiac Inc Princeton Forrestal Village,116 Village Blvd,Suite 200 Princeton, NJ 08540 Voice : (929) 268-0690 Email: [email protected] -- You received this message because you are subscribed to the Google Groups "SAP ABAP" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. Visit this group at http://groups.google.com/group/sap-abap. For more options, visit https://groups.google.com/d/optout.
