Please reply to [email protected] only 

 

Hello, 

 

I am Baachi working on behalf of Ziplogic LLC. We have an immediate opportunity 
in Dallas, Texas for ASIC Physical Design Engineer: Encounter, Magma Primetime.

 

Please review the below need and let us know if you have anyone available and 
interested.

 

Email me a copy of your WORD formatted resume with requirement title.

1.      Full Name:  

2.      Availability: 

3.      Contact number: 

4.      Email Id: 

5.      Current Location: 

6.      Visa Status (Citizen/G.C/H1B): 

7.      Expected Rate: 

 

 

 

Requirement Details:

 

Job Title                                               :           ASIC 
Physical Design Engineer: Encounter, Magma Primetime

Job Type (Contract)                              :           12+ Months

Location                                               :           Dallas, Texas

 

 

Bill Rate $47/hour 

 

  a.. 3-4 years of digital ASIC physical design execution and implementation 
experience. 
 

PRIMARY ACTIVITIES:-

  a.. Execute ASIC physical design using Cadence Encounter and Magma tool sets 
using a netlist to GDS flow AND use of PrimeTime for static timing closure of 
complex SoCs, ASICs.
  b..  Address sub-nanometer technology issues such as signal integrity, 
electrical analysis, power analysis, circuits, and etc. 
  c.. Carry out the following physical design tasks: 
    a.. physical synthesis, floor planning, test insertion, clock tree 
synthesis, place and route, parasitic extraction, static timing analysis, 
    b.. GV/SV, crosstalk, power analysis, post-layout timing closure and custom 
cell development. May be called upon to perform block level design tasks. 
    c.. Generate accurate timing constraints for complex SOC designs that have 
a large number of clocks and multiple operational modes. 
 

RELATED ACTIVITIES:-

  a.. Interface with RTL designers to assess floorplan quality and provide 
feedback prior to final handoff for physical layout execution.
  b.. Automate process using Perl and TCL scripting to ensure that design 
iterations can be completed quickly and efficiently. Ensure the testability of 
large complex designs through the definition and execution of the optimum DFT 
strategy. 
 

TECHNICAL SKILLS:-

Familiarity with the following tools may be required:-

  a.. Avant! Jupiter/Apollo, Synopsys Physical Compiler ,Synopsys Design 
Compiler, Magma Blast Plan, Magma Blast Fusion, Synopsys Design Power, Synopsys 
Test Compiler, Avant! STAR-RC and Synopsys PrimeTime. 
  b.. Software skills should include the ability to write/debug PERL, Scheme 
and TCL scripts. 
  c.. A good knowledge of HDL and digital design techniques is essential. 
  d.. Experience with the UNIX operating system is required."
 

 

 

 

  

Thanks and Regards

Baachi

Resource Manager,

Direct: 510-250-7616, Alt Ph: 510-250-7617

EFax: 510-578-1309

[email protected]

Yahoo IM: baachi_hr

Gtalk IM: ziplogicbaachi

 

We help our clients, employees & partners compete and win! 

 

********************************************************************************************************************************************************************************************************

 

If wanted to be Removed, Plz reply in the subject line "Remove". Sorry for the 
inconvenience caused.

 

-- 
You received this message because you are subscribed to the Google Groups "SAP 
ABAP" group.
To post to this group, send email to [email protected].
To unsubscribe from this group, send email to 
[email protected].
For more options, visit this group at 
http://groups.google.com/group/sap-abap?hl=en.

Reply via email to