> > Hi > > > > Role : Hardware FPGA Engineer > > Duration : 12+ Months > > Location : Ft worth, TX > > *Relevant Experience : 6+ year* > > > > *JD :* > > > > > > · Hands on with VHDL, Verilog/System Verilog programming > > · Hands on with Xilinx, Zynq -SOC > > · Hands on with Toolset: Questa, ModelSim, Vivaldo > > · Hands on Experience with Digital Design, Circuit Analysis, > Schematics Design, Schematics Layout/Capture. > > · Digital Design – DDR2/3 memories, FLASH, Ethernet, USB, > UART,PCI/PCIe design/interface > > · Should be Familiar with tools : Mentor graphics DX designer for > schematics, Mentor graphics tools for layout > > · Should be familiar with Test equipment(Oscilloscope, Spectrum > analyzers) > > · Able to communicate with cross functional teams (Shop test, > manufacturing, Suppliers, Sourcing, Drafting team.) > > · Should be familiar with EMI/EMC, Shock and Vibration, > Environmental qualification, Signal integrity test, Functional Testing. > > · Should prepare Documentation, Purchase Specifications, User > Manuals > > Familiar with Rail Road Standards like AREMA,CENELEC etc. > > > > > > > > *Saurabh Sharma* > > SAP AND IT CONSULTING SERVICES > > 4606 FM 1960 Rd W, Suite 400 Houston, Texas-77069 > > T: 281 954 5503 | (855) 647-8754 EXT 702 > > Email: saur...@e-infionics.com <raj...@e-infionics.com> | > saurabhsysmind...@gmail.com > > Web: www.e-infionics.com > > >
-- You received this message because you are subscribed to the Google Groups "SAP-SAP" group. To unsubscribe from this group and stop receiving emails from it, send an email to sap-sap+unsubscr...@googlegroups.com. To post to this group, send email to email@example.com. Visit this group at https://groups.google.com/group/sap-sap. For more options, visit https://groups.google.com/d/optout.