Hi
Sorry, perhaps I am sending it to the wrong forum but could you please add
this file to the project.
Cheers
Gudjon
/*--------------------------------------------------------------------------
P89c66x.H
This header allows to use the microcontroler Philips P89c66x
with the compiler SDCC.
Copyright (c) 2007 Gudjon I. Gudjonsson <gudjon AT gudjon.org>
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
The registered are ordered in the same way as in the NXP data sheet
P89C660_662_664_3.PDF, see http://www.nxp.com
--------------------------------------------------------------------------*/
#ifndef __P89c66x_H__
#define __P89c66x_H__
/* BYTE Registers */
__sfr __at (0xE0) ACC ;
__sfr __at (0x8E) AUXR ;
__sfr __at (0xA2) AUXR1 ;
__sfr __at (0xF0) B ;
__sbit __at (0xF7) B7 ;
__sbit __at (0xF6) B6 ;
__sbit __at (0xF5) B5 ;
__sbit __at (0xF4) B4 ;
__sbit __at (0xF3) B3 ;
__sbit __at (0xF2) B2 ;
__sbit __at (0xF1) B1 ;
__sbit __at (0xF0) B0 ;
__sfr __at (0xFA) CCAP0H ;
__sfr __at (0xFB) CCAP1H ;
__sfr __at (0xFC) CCAP2H ;
__sfr __at (0xFD) CCAP3H ;
__sfr __at (0xFE) CCAP4H ;
__sfr __at (0xEA) CCAP0L ;
__sfr __at (0xEB) CCAP1L ;
__sfr __at (0xEC) CCAP2L ;
__sfr __at (0xED) CCAP3L ;
__sfr __at (0xEE) CCAP4L ;
__sfr __at (0xC2) CCAPM0 ;
__sfr __at (0xC3) CCAPM1 ;
__sfr __at (0xC4) CCAPM2 ;
__sfr __at (0xC5) CCAPM3 ;
__sfr __at (0xC6) CCAPM4 ;
__sfr __at (0xC0) CCON ;
__sbit __at (0xC7) CF; //CCON_7
__sbit __at (0xC6) CR; //CCON_6
__sbit __at (0xC4) CCF4; //CCON_4;
__sbit __at (0xC3) CCF3; //CCON_3;
__sbit __at (0xC2) CCF2; //CCON_2;
__sbit __at (0xC1) CCF1; //CCON_1;
__sbit __at (0xC0) CCF0; //CCF0;
__sfr __at (0xF9) CH ;
__sfr __at (0xE9) CL ;
__sfr __at (0xC1) CMOD ;
__sfr __at (0x83) DPH ;
__sfr __at (0x82) DPL ;
__sfr __at (0xA8) IEN0 ;
__sbit __at (0xAF) EA ; //IE_7;
__sbit __at (0xAE) EC ; //IE_6;
__sbit __at (0xAD) ES1 ; //IE_5;
__sbit __at (0xAC) ES0 ; //IE_4;
__sbit __at (0xAB) ET1 ; //IE_3;
__sbit __at (0xAA) EX1 ; //IE_2;
__sbit __at (0xA9) ET0 ; //IE_1;
__sbit __at (0xA8) EX0 ; //IE_0;
__sfr __at (0xE8) IEN1 ;
__sbit __at (0xB8) ET2 ; //IEN1_0;
__sfr __at (0xB8) IP ;
__sbit __at (0xBE) PT2 ; //IP_7;
__sbit __at (0xBE) PPC ; //IP_6;
__sbit __at (0xBD) PS1 ; //IP_5;
__sbit __at (0xBC) PS0 ; //IP_4;
__sbit __at (0xBB) PT1 ; //IP_3;
__sbit __at (0xBA) PX1 ; //IP_2;
__sbit __at (0xB9) PT0 ; //IP_1;
__sbit __at (0xB8) PX0 ; //IP_0;
__sfr __at (0xB7) IPH ;
__sfr __at (0x80) P0 ;
__sbit __at (0x87) AD7 ; //P0_7
__sbit __at (0x87) P0_7 ;
__sbit __at (0x86) AD6 ; //P0_6
__sbit __at (0x86) P0_6 ;
__sbit __at (0x85) AD5 ; //P0_5
__sbit __at (0x85) P0_5 ;
__sbit __at (0x84) AD4 ; //P0_4
__sbit __at (0x84) P0_4 ;
__sbit __at (0x83) AD3 ; //P0_3
__sbit __at (0x83) P0_3 ;
__sbit __at (0x82) AD2 ; //P0_2
__sbit __at (0x82) P0_2 ;
__sbit __at (0x81) AD1 ; //P0_1
__sbit __at (0x81) P0_1 ;
__sbit __at (0x80) AD0 ; //P0_0
__sbit __at (0x80) P0_0 ;
__sfr __at (0x90) P1 ;
__sbit __at (0x97) T1_CEX4 ; //P1_7;
__sbit __at (0x97) P1_7 ;
__sbit __at (0x96) T0_CEX3 ; //P1_6;
__sbit __at (0x96) P1_6 ;
__sbit __at (0x95) CEX2 ; //P1_5;
__sbit __at (0x95) P1_5 ;
__sbit __at (0x94) CEX1 ; //P1_4;
__sbit __at (0x94) P1_4 ;
__sbit __at (0x93) CEX0 ; //P1_3;
__sbit __at (0x93) P1_3 ;
__sbit __at (0x92) ECI ; //P1_2;
__sbit __at (0x92) P1_2 ;
__sbit __at (0x91) T2EX ; //P1_1;
__sbit __at (0x91) P1_1 ;
__sbit __at (0x90) T2 ; //P1_0;
__sbit __at (0x90) P1_0 ;
__sfr __at (0xA0) P2 ;
__sbit __at (0xA7) AD15 ; //P2_7;
__sbit __at (0xA7) P2_7 ;
__sbit __at (0xA6) AD14 ; //P2_6;
__sbit __at (0xA6) P2_6 ;
__sbit __at (0xA5) AD13 ; //P2_5;
__sbit __at (0xA5) P2_5 ;
__sbit __at (0xA4) AD12 ; //P2_4;
__sbit __at (0xA4) P2_4 ;
__sbit __at (0xA3) AD11 ; //P2_3;
__sbit __at (0xA3) P2_3 ;
__sbit __at (0xA2) AD10 ; //P2_2;
__sbit __at (0xA2) P2_2 ;
__sbit __at (0xA1) AD9 ; //P2_1;
__sbit __at (0xA1) P2_1 ;
__sbit __at (0xA0) AD8 ; //P2_0;
__sbit __at (0xA0) P2_0 ;
__sfr __at (0xB0) P3 ;
__sbit __at (0xB7) RD ; //P3_7;
__sbit __at (0xB7) P3_7 ;
__sbit __at (0xB6) WR ; //P3_6;
__sbit __at (0xB6) P3_6 ;
__sbit __at (0xB5) T1 ; //P3_5;
__sbit __at (0xB5) P3_5 ;
__sbit __at (0xB4) T0 ; //P3_4;
__sbit __at (0xB4) P3_4 ;
__sbit __at (0xB3) INT1 ; //P3_3;
__sbit __at (0xB3) P3_3 ;
__sbit __at (0xB2) INT0 ; //P3_2;
__sbit __at (0xB2) P3_2 ;
__sbit __at (0xB1) TXD ; //P3_1;
__sbit __at (0xB1) P3_1 ;
__sbit __at (0xB0) RXD ; //P3_0;
__sbit __at (0xB0) P3_0 ;
__sfr __at (0x87) PCON ;
__sfr __at (0xD0) PSW ;
__sbit __at (0xD7) CY ; //PSW_7
__sbit __at (0xD6) AC ; //PSW_6;
__sbit __at (0xD5) F0 ; //PSW_5;
__sbit __at (0xD4) RS1 ; //PSW_4;
__sbit __at (0xD3) RS0 ; //PSW_3;
__sbit __at (0xD2) OV ; //PSW_2;
__sbit __at (0xD0) P ; //PSW_0;
__sfr __at (0xCB) RCAP2H ;
__sfr __at (0xCA) RCAP2L ;
__sfr __at (0xA9) SADDR ; // Slave Address
__sfr __at (0xB9) SADEN ; // Slave Address Mask
__sfr __at (0x99) S0BUF ;
__sfr __at (0x98) S0CON ;
__sbit __at (0x9F) SM0_FE ; //SCON_7
__sbit __at (0x9E) SM1 ; //SCON_6
__sbit __at (0x9D) SM2 ; //SCON_5
__sbit __at (0x9C) REN ; //SCON_4
__sbit __at (0x9B) TB8 ; //SCON_3
__sbit __at (0x9A) RB8 ; //SCON_2
__sbit __at (0x99) TI ; //SCON_1
__sbit __at (0x98) RI ; //SCON_0
__sfr __at (0x81) SP ;
__sfr __at (0xDA) S1DAT ; // Serial 1 Data
__sfr __at (0xDC) S1IST ; // Serial 1 Internal Status
__sfr __at (0xDB) S1ADR ; // Serial 1 Address
__sfr __at (0xD9) S1STA ; // Serial 1 Status
__sfr __at (0xD8) S1CON ; // Serial 1 Control
__sbit __at (0xDF) CR2 ; //S1CON_7;
__sbit __at (0xDE) ENS1 ; //S1CON_6;
__sbit __at (0xDD) STA ; //S1CON_6;
__sbit __at (0xDC) STO ; //S1CON_4;
__sbit __at (0xDB) SI ; //S1CON_3;
__sbit __at (0xDA) AA ; //S1CON_2;
__sbit __at (0xD9) CR01 ; //S1CON_1;
__sbit __at (0xD8) CR0 ; //S1CON_0;
__sfr __at (0x88) TCON ;
__sbit __at (0x8F) TF1 ; //TCON_7;
__sbit __at (0x8E) TR1 ; //TCON_6;
__sbit __at (0x8D) TF0 ; //TCON_5;
__sbit __at (0x8C) TR0 ; //TCON_4;
__sbit __at (0x8B) IE1 ; //TCON_3;
__sbit __at (0x8A) IT1 ; //TCON_2;
__sbit __at (0x89) IE0 ; //TCON_1;
__sbit __at (0x88) IT0 ; //TCON_0;
__sfr __at (0xC8) T2CON ;
__sbit __at (0xCF) TF2 ; //T2CON_7;
__sbit __at (0xCE) EXF2 ; //T2CON_6;
__sbit __at (0xCD) RCLK ; //T2CON_5;
__sbit __at (0xCC) TCLK ; //T2CON_4;
__sbit __at (0xCB) EXEN2; //T2CON_3;
__sbit __at (0xCA) TR2 ; //T2CON_2;
__sbit __at (0xC9) C_T2 ; //T2CON_1;
__sbit __at (0xC8) CP_RL2; //T2CON_0;
__sfr __at (0xC9) T2MOD ;
__sfr __at (0x8C) TH0 ;
__sfr __at (0x8D) TH1 ;
__sfr __at (0xCD) TH2 ;
__sfr __at (0x8A) TL0 ;
__sfr __at (0x8B) TL1 ;
__sfr __at (0xCC) TL2 ;
__sfr __at (0x89) TMOD ;
__sfr __at (0xA6) WDTRST ;
#endif
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