Le samedi 19 janvier 2013 06:48:41, Erik Petrich a écrit : > The compiler is thinking you are trying to use TI as a binary semaphore > and so implements the sequence with an atomic test and clear to eliminate > the possibility that an interrupt might occur between the while loop and > the assignment. It does not realize that you are simply polling a hardware > status bit followed by a write to a control bit (that happens to be at the > same location as the status bit). From a C perspective, both of these > operations look like the same C code.
This makes sense, indeed. I think I'll use the "TIclear" solution, as I'm not yet sure about the effect of reordering (next instruction is a write to serial data register, of which TI is the "transmit done" flag), and the peephole rule may (if I understand the doc correctly) apply to "too much" code (I don't know if that ASM pattern is present in another place in this program, and interrupts are enabled so atomicity may be expected someplace else). Thanks a lot for this detailed explanation and all proposed solutions. Regards, -- Vincent Pelletier ------------------------------------------------------------------------------ Master Visual Studio, SharePoint, SQL, ASP.NET, C# 2012, HTML5, CSS, MVC, Windows 8 Apps, JavaScript and much more. Keep your skills current with LearnDevNow - 3,200 step-by-step video tutorials by Microsoft MVPs and experts. SALE $99.99 this month only -- learn more at: http://p.sf.net/sfu/learnmore_122912 _______________________________________________ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
