Am 06.06.2015 um 09:50 schrieb Philipp Klaus Krause:
> On 05.06.2015 16:12, Simon Dible wrote:
>> Hi
>>
>> I'm working on an 8051 FPGA image that has broken logical operations on
>> the carry flag, at this time its not viable to fix them. Is there some
>> way to make sdcc for the 8051 not generate these instructions, or work
>> out what C code would generate them to avoid using it?
>>
>> ORL C, /bit
>> ORL C, bit
>> ANL C, /bit
>> ANL C, bit
>> MOV C, bit
>>
>> Many thanks
>> Simon
>
> Maybe you can use custom rules for the peephole optimizer to replace
> these instructions by others in the generated code?
>
> Philipp
Hi Philipp,
you were quicker:) Simon, you probably have a chance to work around it with
peephole rules requiring no compiler modification at all.
Idea is to use the JB bit,rel instruction to access the bit, peephole rule for
that could look similar to:
replace {
mov c,%1
} by {
; Peephole 1000.a mov c,%1 workaround fix
; push acc
jb %1, . + x ; adapt relative jump
clrb c
sjmp . + y ; adapt relative jump
setb c
; pop acc
}
Greetings,
Frieder
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