Am 07.06.20 um 15:37 schrieb Eric Rullens: > The manual shows several samples for doing this. The main trick seems to be > to enable access to the "special special" function registers in XRAM space. > > "The following special function registers are expanded SFR and logical > address is located in the XDATA area. Before accessing, the P_SW2 (BAH) > register's highest position (EAXFR) is placed to 1. Then MOVX A, @DPTR and > MOVX @DPTR, A instruction are used to access." > > E.g. > > P_SW2 = 0x80; > CKSEL = 0x00; // Select the internal IRC (default) > P_SW2 = 0x00; > > I don't have access to this particular chip, but hope it helps anyway... > > Eric
Thanks. This helped indeed. I now can set CLKDIV. And doing so explains my other problem as well: The speed is the same on startup, as when I set CLKDIV = 1. When setting CLKDIV = 8, it only runs at one-eigth that speed! Looks like the reset value for CLKDIV is actually 1, despite being stated as 8 in the datasheet! Philipp _______________________________________________ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
