Attached is a re-write of my previous patch that changes i8042_flush to
be timeout based rather than buffer size based.... Which turns out to
not be significantly different, since the udelay in the loop is the
basis for the timing. I created the I8042_FLUSH_TIMEOUT delay, and used
it similarly to the I8042_CTL_TIMEOUT define; however the flush timeout
is much shorter.
I was tempted to make the "50" that is hard coded into the udelays into
a define to make the timeout defines more readable, but it seemed like
unnecessary refactoring that is outside of the scope of this change.
As a tangentially related aside, I found my bug in the device model that
was causing the queue to be full so early as well. So the keyboard is
working for me even without this patch now.
-John
diff --git a/src/ps2port.c b/src/ps2port.c
index 58335af..6385429 100644
--- a/src/ps2port.c
+++ b/src/ps2port.c
@@ -19,8 +19,7 @@
// Timeout value.
#define I8042_CTL_TIMEOUT 10000
-
-#define I8042_BUFFER_SIZE 16
+#define I8042_FLUSH_TIMEOUT 300
static int
i8042_wait_read(void)
@@ -57,7 +56,7 @@ i8042_flush(void)
{
dprintf(7, "i8042_flush\n");
int i;
- for (i=0; i<I8042_BUFFER_SIZE; i++) {
+ for (i=0; i<I8042_FLUSH_TIMEOUT; i++) {
u8 status = inb(PORT_PS2_STATUS);
if (! (status & I8042_STR_OBF))
return 0;
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