Hi, What is your setup? I want to reproduce this case >> a) Provide 64bit bar support for PCI BARs and bridges with 64bit memory >> window. > Bridge support seems to be completely untested. /me has a test setup > using mst's bridge patches which looks like this: > > [root@fedora ~]# lspci -tv > -[0000:00]-+-00.0 Intel Corporation 440FX - 82441FX PMC [Natoma] > +-01.0 Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] > +-01.1 Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] > +-01.2 Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] > +-01.3 Intel Corporation 82371AB/EB/MB PIIX4 ACPI > +-02.0 Red Hat, Inc. Device 0100 > +-03.0 Red Hat, Inc Virtio network device > +-05.0 Red Hat, Inc Virtio console > +-06.0 Intel Corporation 82801AA AC'97 Audio Controller > +-0a.0 Red Hat, Inc Device 1009 > +-0b.0 Red Hat, Inc Device 1009 > +-10.0-[01]----01.0 Red Hat, Inc Device 1110 > +-10.1-[02]----01.0 Red Hat, Inc Virtio memory balloon > +-10.2-[03]-- > +-10.3-[04]-- > +-11.0-[05-07]--+-01.0-[06]--+-01.0 Red Hat, Inc Device 1110 > | | \-02.0 Red Hat, Inc Device 1110 > | \-02.0-[07]--+-01.0 Red Hat, Inc Device 1110 > | \-02.0 Red Hat, Inc Device 1110 > +-1d.0 Intel Corporation 82801I (ICH9 Family) USB UHCI > Controller #1 > +-1d.1 Intel Corporation 82801I (ICH9 Family) USB UHCI > Controller #2 > +-1d.2 Intel Corporation 82801I (ICH9 Family) USB UHCI > Controller #3 > +-1d.7 Intel Corporation 82801I (ICH9 Family) USB2 EHCI > Controller #1 > \-1f.0 Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port > SATA AHCI Controller > > The linux kernel completely redoes the bridge resource assignment. The > seabios log looks sane for the root bus devices but not for devices > behind bridges: > > === PCI new allocation pass #2 === > PCI region entry: bdf=00:06.0 BAR 0 base=0x000000000000c000 > size=0x0000000000000400 [io, 32bits] > PCI region entry: bdf=00:06.0 BAR 1 base=0x000000000000c400 > size=0x0000000000000100 [io, 32bits] > PCI region entry: bdf=00:0b.0 BAR 0 base=0x000000000000c500 > size=0x0000000000000040 [io, 32bits] > PCI region entry: bdf=00:0a.0 BAR 0 base=0x000000000000c540 > size=0x0000000000000040 [io, 32bits] > PCI region entry: bdf=00:1f.0 BAR 4 base=0x000000000000c580 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:1d.2 BAR 4 base=0x000000000000c5a0 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:1d.1 BAR 4 base=0x000000000000c5c0 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:1d.0 BAR 4 base=0x000000000000c5e0 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:05.0 BAR 0 base=0x000000000000c600 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:03.0 BAR 0 base=0x000000000000c620 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:02.0 BAR 3 base=0x000000000000c640 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:01.2 BAR 4 base=0x000000000000c660 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=00:01.1 BAR 4 base=0x000000000000c680 > size=0x0000000000000010 [io, 32bits] > PCI region entry: bdf=00:02.0 BAR 0 base=0x00000000f8000000 > size=0x0000000004000000 [mem, 32bits] > PCI region entry: bdf=00:02.0 BAR 1 base=0x00000000fc000000 > size=0x0000000001000000 [mem, 32bits] > PCI region entry: bdf=00:03.0 BAR 6 base=0x00000000fd000000 > size=0x0000000000010000 [mem, 32bits] > PCI region entry: bdf=00:02.0 BAR 6 base=0x00000000fd010000 > size=0x0000000000010000 [mem, 32bits] > PCI region entry: bdf=00:02.0 BAR 2 base=0x00000000fd020000 > size=0x0000000000002000 [mem, 32bits] > PCI region entry: bdf=00:1f.0 BAR 5 base=0x00000000fd022000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=00:1d.7 BAR 0 base=0x00000000fd023000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=00:0b.0 BAR 1 base=0x00000000fd024000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=00:0a.0 BAR 1 base=0x00000000fd025000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=00:05.0 BAR 1 base=0x00000000fd026000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=00:03.0 BAR 1 base=0x00000000fd027000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=00:02.0 BAR 4 base=0x00000000e0000000 > size=0x0000000010000000 [prefmem, 64bits] > PCI region entry: bdf=01:01.0 BAR 0 base=0x0000000000000000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=01:01.0 BAR 2 base=0x0000000000000000 > size=0x0000000040000000 [prefmem, 64bits] > PCI region entry: bdf=02:01.0 BAR 0 base=0x0000000000000000 > size=0x0000000000000020 [io, 32bits] > PCI region entry: bdf=06:02.0 BAR 0 base=0x0000000000000000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=06:01.0 BAR 0 base=0x0000000000001000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=06:02.0 BAR 2 base=0x0000000000000000 > size=0x0000000002000000 [prefmem, 64bits] > PCI region entry: bdf=06:01.0 BAR 2 base=0x0000000002000000 > size=0x0000000002000000 [prefmem, 64bits] > PCI region entry: bdf=07:02.0 BAR 0 base=0x0000000000000000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=07:01.0 BAR 0 base=0x0000000000001000 > size=0x0000000000001000 [mem, 32bits] > PCI region entry: bdf=07:02.0 BAR 2 base=0x0000000000000000 > size=0x0000000002000000 [prefmem, 64bits] > PCI region entry: bdf=07:01.0 BAR 2 base=0x0000000002000000 > size=0x0000000002000000 [prefmem, 64bits] > > cheers, > Gerd >
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